From patchwork Mon Jul 1 13:53:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marco Felsch X-Patchwork-Id: 13718145 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 473B2169382 for ; Mon, 1 Jul 2024 13:54:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719842064; cv=none; b=ank2F5bGa/oAhjpa5MNlMyHf9Z6bgEFv+UxtPlnOed9fNYLZVC+cm3FkiTQ5RFwQMIZ4DALYao8SY2fNSfxJvecAlpr3TrJxKkV/VUSOCcEyng0yBDV3puX8iaQNzs+kb90OTPFizp6K9nutv/7rbbzUVxqstIeqMMOILUuxpgU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719842064; c=relaxed/simple; bh=JIVhgNSL/W/L3u6sKue9yo8smnMnjBQqdTAHH2hC9XU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=JLLacAsfobnolea5RDaefnCN6FEpm1CsHgRL0xgCZXUyYD3Q02Cau3RQI4bHZFrodKhyUYFZZTB8btbUnWlo5OF7PCRYYytgZ/FJ0kSC4Tst3xvgNp/eO55omC7BZAZbzvTsxcDrkAafPRGQDSt2qNCpi99v9hoYWt2utqVyeXo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from dude02.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::28]) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1sOHTX-0001LY-Aa; Mon, 01 Jul 2024 15:53:47 +0200 From: Marco Felsch Date: Mon, 01 Jul 2024 15:53:42 +0200 Subject: [PATCH 3/9] mtd: add support to handle EEPROM devices Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240701-b4-v6-10-topic-usbc-tcpci-v1-3-3fd5f4a193cc@pengutronix.de> References: <20240701-b4-v6-10-topic-usbc-tcpci-v1-0-3fd5f4a193cc@pengutronix.de> In-Reply-To: <20240701-b4-v6-10-topic-usbc-tcpci-v1-0-3fd5f4a193cc@pengutronix.de> To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Arnd Bergmann , Greg Kroah-Hartman , Bartosz Golaszewski , Russell King , Joel Stanley , Andrew Jeffery , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Vladimir Zapolskiy , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Tony Lindgren , Geert Uytterhoeven , Magnus Damm , Dinh Nguyen , Thierry Reding , Jonathan Hunter , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Michael Ellerman , Nicholas Piggin , Christophe Leroy , "Naveen N. Rao" , Thomas Bogendoerfer , Huacai Chen , WANG Xuerui Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, imx@lists.linux.dev, linux-omap@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-tegra@vger.kernel.org, openbmc@lists.ozlabs.org, linuxppc-dev@lists.ozlabs.org, linux-mips@vger.kernel.org, loongarch@lists.linux.dev, Marco Felsch X-Mailer: b4 0.15-dev X-SA-Exim-Connect-IP: 2a0a:edc0:0:1101:1d::28 X-SA-Exim-Mail-From: m.felsch@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-omap@vger.kernel.org At the moment EEPROMs are covered by misc/driver/eeprom/* drivers. This commit prepares the MTD framework to handle EEPROM devices within the MTD layer. To keep the backward compatibility with the current misc drivers the master device must be exposed always. Furthermore the NVMEM device parent must be set to the I2C device instead of the MTD device and the name must be either the I2C device name or the name specified via the label. Signed-off-by: Marco Felsch --- drivers/mtd/mtdcore.c | 32 +++++++++++++++++++++++++++++++- include/uapi/mtd/mtd-abi.h | 2 ++ 2 files changed, 33 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c index dcd97e59425e..e2a996ccd17e 100644 --- a/drivers/mtd/mtdcore.c +++ b/drivers/mtd/mtdcore.c @@ -149,6 +149,9 @@ static ssize_t mtd_type_show(struct device *dev, case MTD_ROM: type = "rom"; break; + case MTD_EEPROM: + type = "eeprom"; + break; case MTD_NORFLASH: type = "nor"; break; @@ -578,6 +581,33 @@ static int mtd_nvmem_add(struct mtd_info *mtd) config.ignore_wp = true; config.priv = mtd; + switch (mtd->type) { + case MTD_EEPROM: + config.type = NVMEM_TYPE_EEPROM; + /* + * The master device must be backward compatible with the + * predecessor (misc/eeprom/at24.c) driver. Therefore we need to + * adapt the naming scheme. + * + * Initialize config.id to NVMEM_DEVID_AUTO even if the + * mtd->name is provided via an label as some platform can have + * multiple eeproms with same label and we can not register each + * of those with same label. Failing to register those eeproms + * trigger cascade failure on such platform. + */ + if (mtd_is_master(mtd)) { + config.id = NVMEM_DEVID_AUTO; + config.compat = true; + config.name = mtd->name; + config.dev = mtd->dev.parent; + config.base_dev = mtd->dev.parent; + } + break; + default: + config.type = NVMEM_TYPE_UNKNOWN; + break; + } + mtd->nvmem = nvmem_register(&config); if (IS_ERR(mtd->nvmem)) { /* Just ignore if there is no NVMEM support in the kernel */ @@ -1076,7 +1106,7 @@ int mtd_device_parse_register(struct mtd_info *mtd, const char * const *types, if (ret) goto out; - if (IS_ENABLED(CONFIG_MTD_PARTITIONED_MASTER)) { + if (IS_ENABLED(CONFIG_MTD_PARTITIONED_MASTER) || mtd->type == MTD_EEPROM) { ret = add_mtd_device(mtd); if (ret) goto out; diff --git a/include/uapi/mtd/mtd-abi.h b/include/uapi/mtd/mtd-abi.h index 714d55b49d2a..59bf43d58ddb 100644 --- a/include/uapi/mtd/mtd-abi.h +++ b/include/uapi/mtd/mtd-abi.h @@ -146,6 +146,7 @@ struct mtd_read_req { #define MTD_DATAFLASH 6 #define MTD_UBIVOLUME 7 #define MTD_MLCNANDFLASH 8 /* MLC NAND (including TLC) */ +#define MTD_EEPROM 9 #define MTD_WRITEABLE 0x400 /* Device is writeable */ #define MTD_BIT_WRITEABLE 0x800 /* Single bits can be flipped */ @@ -159,6 +160,7 @@ struct mtd_read_req { #define MTD_CAP_NORFLASH (MTD_WRITEABLE | MTD_BIT_WRITEABLE) #define MTD_CAP_NANDFLASH (MTD_WRITEABLE) #define MTD_CAP_NVRAM (MTD_WRITEABLE | MTD_BIT_WRITEABLE | MTD_NO_ERASE) +#define MTD_CAP_EEPROM (MTD_WRITEABLE | MTD_BIT_WRITEABLE | MTD_NO_ERASE) /* Obsolete ECC byte placement modes (used with obsolete MEMGETOOBSEL) */ #define MTD_NANDECC_OFF 0 /* Switch off ECC (Not recommended) */