From patchwork Wed May 18 23:36:32 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Gerlach X-Patchwork-Id: 9123011 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6E2039F1D3 for ; Wed, 18 May 2016 23:37:20 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 99D692034A for ; Wed, 18 May 2016 23:37:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1D93020225 for ; Wed, 18 May 2016 23:37:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752201AbcERXhP (ORCPT ); Wed, 18 May 2016 19:37:15 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:57747 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752076AbcERXhK (ORCPT ); Wed, 18 May 2016 19:37:10 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id u4INal2P022881; Wed, 18 May 2016 18:36:47 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id u4INaknu002157; Wed, 18 May 2016 18:36:47 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.294.0; Wed, 18 May 2016 18:36:46 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u4INakQN025102; Wed, 18 May 2016 18:36:46 -0500 Received: from localhost (uda0274052.am.dhcp.ti.com [128.247.83.19]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id u4INak319648; Wed, 18 May 2016 18:36:46 -0500 (CDT) From: Dave Gerlach To: , , , , Tony Lindgren CC: Viresh Kumar , Rob Herring , Mark Rutland , Nishanth Menon , Yegor Yefremov , Dave Gerlach Subject: [PATCH 7/8] ARM: dts: dra7: Move cpus node to parent dts for dra74x and dra72x Date: Wed, 18 May 2016 18:36:32 -0500 Message-ID: <282afe5e02c165dfd6d5de7d7480a8854cfe16a8.1463606963.git.d-gerlach@ti.com> X-Mailer: git-send-email 2.7.3 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Nearly all of the information in the cpus node, especially for cpu0, is the same between dra74x and dra72x so move the common information to the parent dra7.dtsi to avoid duplication of data. Signed-off-by: Dave Gerlach --- arch/arm/boot/dts/dra7.dtsi | 27 +++++++++++++++++++++++++++ arch/arm/boot/dts/dra72x.dtsi | 16 ---------------- arch/arm/boot/dts/dra74x.dtsi | 24 ------------------------ 3 files changed, 27 insertions(+), 40 deletions(-) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 406f6ff21d7f..104b62657163 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -73,6 +73,33 @@ interrupt-parent = <&gic>; }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0>; + + operating-points = < + /* kHz uV */ + 1000000 1060000 + 1176000 1160000 + >; + + clocks = <&dpll_mpu_ck>; + clock-names = "cpu"; + + clock-latency = <300000>; /* From omap-cpufreq driver */ + + /* cooling options */ + cooling-min-level = <0>; + cooling-max-level = <2>; + #cooling-cells = <2>; /* min followed by max */ + }; + }; + /* * The soc node represents the soc top level view. It is used for IPs * that are not memory mapped in the MPU view or for the MPU itself. diff --git a/arch/arm/boot/dts/dra72x.dtsi b/arch/arm/boot/dts/dra72x.dtsi index 70a217050a4c..67107605fb4c 100644 --- a/arch/arm/boot/dts/dra72x.dtsi +++ b/arch/arm/boot/dts/dra72x.dtsi @@ -12,22 +12,6 @@ / { compatible = "ti,dra722", "ti,dra72", "ti,dra7"; - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0>; - - /* cooling options */ - cooling-min-level = <0>; - cooling-max-level = <2>; - #cooling-cells = <2>; /* min followed by max */ - }; - }; - pmu { compatible = "arm,cortex-a15-pmu"; interrupt-parent = <&wakeupgen>; diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi index 4220eeffc65a..0c31db3a8919 100644 --- a/arch/arm/boot/dts/dra74x.dtsi +++ b/arch/arm/boot/dts/dra74x.dtsi @@ -13,30 +13,6 @@ compatible = "ti,dra742", "ti,dra74", "ti,dra7"; cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0>; - - operating-points = < - /* kHz uV */ - 1000000 1060000 - 1176000 1160000 - >; - - clocks = <&dpll_mpu_ck>; - clock-names = "cpu"; - - clock-latency = <300000>; /* From omap-cpufreq driver */ - - /* cooling options */ - cooling-min-level = <0>; - cooling-max-level = <2>; - #cooling-cells = <2>; /* min followed by max */ - }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a15";