From patchwork Mon May 27 14:37:36 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Afzal Mohammed X-Patchwork-Id: 2620401 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 3D904DF215 for ; Mon, 27 May 2013 14:38:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932855Ab3E0OiN (ORCPT ); Mon, 27 May 2013 10:38:13 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:35674 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932777Ab3E0OiL (ORCPT ); Mon, 27 May 2013 10:38:11 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r4REbfZZ017191; Mon, 27 May 2013 09:37:41 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id r4REbfWc002754; Mon, 27 May 2013 09:37:41 -0500 Received: from dlelxv23.itg.ti.com (172.17.1.198) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.2.342.3; Mon, 27 May 2013 09:37:41 -0500 Received: from psplinux063.india.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by dlelxv23.itg.ti.com (8.13.8/8.13.8) with ESMTP id r4REbb99010026; Mon, 27 May 2013 09:37:38 -0500 From: Afzal Mohammed To: , , , , CC: Tony Lindgren , Russell King , Benoit Cousson , Grant Likely , Rob Herring , Rob Landley , Ankur Kishore Subject: [PATCH v2 14/14] ARM: dts: AM43x: initial support Date: Mon, 27 May 2013 20:07:36 +0530 Message-ID: <3790fa57fc4c69da12224fbcec17cd07c59771a0.1369658705.git.afzal@ti.com> X-Mailer: git-send-email 1.7.12 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org DT source (minimal) for AM4372 SoC to represent AM43x SoC's. Those represented here are the minimal DT nodes necessary to get kernel booting. In DT nodes, "ti,hwmod" property has not been added, this would be added along with PRCM support for AM43x. Signed-off-by: Ankur Kishore Signed-off-by: Afzal Mohammed --- v2: Add gptimer 1ms, timer2, synctimer and remove twd local timer arch/arm/boot/dts/am4372.dtsi | 66 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) create mode 100644 arch/arm/boot/dts/am4372.dtsi diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi new file mode 100644 index 0000000..1d58298 --- /dev/null +++ b/arch/arm/boot/dts/am4372.dtsi @@ -0,0 +1,66 @@ +/* + * Device Tree Source for AM4372 SoC + * + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/include/ "skeleton.dtsi" + +/ { + compatible = "ti,am4372", "ti,am43"; + interrupt-parent = <&gic>; + + + aliases { + serial0 = &uart1; + }; + + cpus { + cpu@0 { + compatible = "arm,cortex-a9"; + }; + }; + + gic: interrupt-controller@48241000 { + compatible = "arm,cortex-a9-gic"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x48241000 0x1000>, + <0x48240100 0x0100>; + }; + + ocp { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + uart1: serial@44e09000 { + compatible = "ti,am4372-uart","ti,omap2-uart"; + reg = <0x44e09000 0x2000>; + interrupts = <0 72 0x4>; + }; + + timer1: timer@44e31000 { + compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms"; + reg = <0x44e31000 0x400>; + interrupts = <0 67 0x4>; + ti,timer-alwon; + }; + + timer2: timer@48040000 { + compatible = "ti,am4372-timer","ti,am335x-timer"; + reg = <0x48040000 0x400>; + interrupts = <0 68 0x4>; + }; + + counter32k: counter@44e86000 { + compatible = "ti,am4372-counter32k","ti,omap-counter32k"; + reg = <0x44e86000 0x40>; + }; + }; +};