diff mbox

Optimize the delay in MMC power sequence

Message ID 38467.192.168.10.88.1252263381.squirrel@dbdmail.itg.ti.com (mailing list archive)
State Awaiting Upstream, archived
Headers show

Commit Message

Madhusudhan Sept. 6, 2009, 6:56 p.m. UTC 
commit 004a049bbab47d382a741d8e8fc6a1b9b44b36ac
Author: Madhu <madhu.cr@ti.com>
Date:   Sun Sep 6 13:18:21 2009 -0400

    Replace the 100mS delay in the MMC power sequence with an appropriate delay
    based on the measurements taken for VDDS stability on SDP with T2 power IC.
    The delay in the power down sequence is not needed since it is taken care in
    the power up sequence.

    Signed-off-by: Madhusudhan Chikkature <madhu.cr@ti.com>

 	return ret;


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diff mbox

Patch

diff --git a/arch/arm/mach-omap2/mmc-twl4030.c b/arch/arm/mach-omap2/mmc-twl4030.c
index 3c04c2f..6a9be61 100644
--- a/arch/arm/mach-omap2/mmc-twl4030.c
+++ b/arch/arm/mach-omap2/mmc-twl4030.c
@@ -237,30 +237,27 @@  static int twl_mmc1_set_power(struct device *dev, int
slot, int power_on,
 		reg &= ~OMAP2_PBIASLITEPWRDNZ0;
 		omap_ctrl_writel(reg, control_pbias_offset);

-		ret = mmc_regulator_set_ocr(c->vcc, vdd);
-
-		/* 100ms delay required for PBIAS configuration */
-		msleep(100);
 		reg = omap_ctrl_readl(control_pbias_offset);
-		reg |= (OMAP2_PBIASLITEPWRDNZ0 | OMAP2_PBIASSPEEDCTRL0);
 		if ((1 << vdd) <= MMC_VDD_165_195)
 			reg &= ~OMAP2_PBIASLITEVMODE0;
 		else
 			reg |= OMAP2_PBIASLITEVMODE0;
 		omap_ctrl_writel(reg, control_pbias_offset);
+
+		ret = mmc_regulator_set_ocr(c->vcc, vdd);
+
+		/* 400uS required for VDDS to stable */
+		udelay(400);
+
+		reg = omap_ctrl_readl(control_pbias_offset);
+		reg |= OMAP2_PBIASLITEPWRDNZ0;
+		omap_ctrl_writel(reg, control_pbias_offset);
 	} else {
 		reg = omap_ctrl_readl(control_pbias_offset);
 		reg &= ~OMAP2_PBIASLITEPWRDNZ0;
 		omap_ctrl_writel(reg, control_pbias_offset);

 		ret = mmc_regulator_set_ocr(c->vcc, 0);
-
-		/* 100ms delay required for PBIAS configuration */
-		msleep(100);
-		reg = omap_ctrl_readl(control_pbias_offset);
-		reg |= (OMAP2_PBIASSPEEDCTRL0 | OMAP2_PBIASLITEPWRDNZ0 |
-			OMAP2_PBIASLITEVMODE0);
-		omap_ctrl_writel(reg, control_pbias_offset);
 	}