From patchwork Tue Aug 21 10:46:00 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Afzal Mohammed X-Patchwork-Id: 1353831 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 9475C40210 for ; Tue, 21 Aug 2012 10:46:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756573Ab2HUKqg (ORCPT ); Tue, 21 Aug 2012 06:46:36 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:45393 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756647Ab2HUKqH (ORCPT ); Tue, 21 Aug 2012 06:46:07 -0400 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id q7LAk2Wd028451; Tue, 21 Aug 2012 05:46:03 -0500 Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id q7LAk223004244; Tue, 21 Aug 2012 16:16:02 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Tue, 21 Aug 2012 16:16:01 +0530 Received: from udx0156546.apr.dhcp.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with ESMTP id q7LAk1cu002563; Tue, 21 Aug 2012 16:16:01 +0530 From: Afzal Mohammed To: , , , , CC: Afzal Mohammed Subject: [PATCH v6 09/10] ARM: OMAP2+: smc91x: generic timing calculation Date: Tue, 21 Aug 2012 16:16:00 +0530 Message-ID: <3a90c0a44f09b51fb0cbb4c0d15db4743eb36bc5.1345524670.git.afzal@ti.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Generic gpmc timing calculation helper is available now, use it instead of custom timing calculation. Signed-off-by: Afzal Mohammed --- arch/arm/mach-omap2/gpmc-smc91x.c | 43 ++++++++++++++---------------------- 1 files changed, 17 insertions(+), 26 deletions(-) diff --git a/arch/arm/mach-omap2/gpmc-smc91x.c b/arch/arm/mach-omap2/gpmc-smc91x.c index ba10c24..43900f9 100644 --- a/arch/arm/mach-omap2/gpmc-smc91x.c +++ b/arch/arm/mach-omap2/gpmc-smc91x.c @@ -57,6 +57,7 @@ static struct platform_device gpmc_smc91x_device = { static int smc91c96_gpmc_retime(void) { struct gpmc_timings t; + struct gpmc_device_timings dev_t; const int t3 = 10; /* Figure 12.2 read and 12.4 write */ const int t4_r = 20; /* Figure 12.2 read */ const int t4_w = 5; /* Figure 12.4 write */ @@ -67,32 +68,6 @@ static int smc91c96_gpmc_retime(void) const int t20 = 185; /* Figure 12.2 read and 12.4 write */ u32 l; - memset(&t, 0, sizeof(t)); - - /* Read timings */ - t.cs_on = 0; - t.adv_on = t.cs_on; - t.oe_on = t.adv_on + t3; - t.access = t.oe_on + t5; - t.oe_off = t.access; - t.adv_rd_off = t.oe_off + max(t4_r, t6); - t.cs_rd_off = t.oe_off; - t.rd_cycle = t20 - t.oe_on; - - /* Write timings */ - t.we_on = t.adv_on + t3; - - if (cpu_is_omap34xx() && (gpmc_cfg->flags & GPMC_MUX_ADD_DATA)) { - t.wr_data_mux_bus = t.we_on; - t.we_off = t.wr_data_mux_bus + t7; - } else - t.we_off = t.we_on + t7; - if (cpu_is_omap34xx()) - t.wr_access = t.we_off; - t.adv_wr_off = t.we_off + max(t4_w, t8); - t.cs_wr_off = t.we_off + t4_w; - t.wr_cycle = t20 - t.we_on; - l = GPMC_CONFIG1_DEVICESIZE_16; if (gpmc_cfg->flags & GPMC_MUX_ADD_DATA) l |= GPMC_CONFIG1_MUXADDDATA; @@ -114,6 +89,22 @@ static int smc91c96_gpmc_retime(void) if (gpmc_cfg->flags & GPMC_MUX_ADD_DATA) return 0; + memset(&dev_t, 0, sizeof(dev_t)); + + dev_t.t_oeasu = t3 * 1000; + dev_t.t_oe = t5 * 1000; + dev_t.t_cez_r = t4_r * 1000; + dev_t.t_oez = t6 * 1000; + dev_t.t_rd_cycle = (t20 - t3) * 1000; + + dev_t.t_weasu = t3 * 1000; + dev_t.t_wpl = t7 * 1000; + dev_t.t_wph = t8 * 1000; + dev_t.t_cez_w = t4_w * 1000; + dev_t.t_wr_cycle = (t20 - t3) * 1000; + + gpmc_calc_timings(&t, &dev_t); + return gpmc_cs_set_timings(gpmc_cfg->cs, &t); }