@@ -42,6 +42,14 @@ config TIDSPBRIDGE_MEMPOOL_SIZE
Allocate specified size of memory at booting time to avoid allocation
failure under heavy memory fragmentation after some use time.
+config TIDSPBRIDGE_DMM_SIZE
+ hex "DMM capable memory size (Byte)"
+ depends on TIDSPBRIDGE
+ default "0x10000000"
+ help
+ Memory size of DSP virtural address for Dynamic Memory Mapping.
+ Please make sure the size is 4K aligned.
+
config TIDSPBRIDGE_DEBUG
bool "Debug Support"
depends on TIDSPBRIDGE
@@ -345,7 +345,6 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt,
OMAP343X_CONTROL_IVA2_BOOTMOD));
}
}
-
if (!status) {
(*pdata->dsp_prm_rmw_bits)(OMAP3430_RST2_IVA2_MASK, 0,
OMAP3430_IVA2_MOD, OMAP2_RM_RSTCTRL);
@@ -362,6 +361,11 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt,
if (!status) {
dev_context->dsp_mmu = mmu;
sm_sg = &dev_context->sh_s;
+ /* Set valid range to map shared memory */
+ status = iommu_set_da_range(mmu, sm_sg->seg0_da,
+ sm_sg->seg1_da + sm_sg->seg1_size);
+ }
+ if (!status) {
sg0_da = iommu_kmap(mmu, sm_sg->seg0_da, sm_sg->seg0_pa,
sm_sg->seg0_size, IOVMF_ENDIAN_LITTLE | IOVMF_ELSZ_32);
if (IS_ERR_VALUE(sg0_da)) {
@@ -411,7 +415,17 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt,
l4_i++;
}
}
-
+ if (!status) {
+ /* Set valid range for DMM mapings */
+ if (MAX_DSP_MMU_DA - CONFIG_TIDSPBRIDGE_DMM_SIZE <
+ sm_sg->seg1_da + sm_sg->seg1_size) {
+ dev_err(bridge, "DMM size too big!\n");
+ status = -ENOMEM;
+ } else {
+ status = iommu_set_da_range(mmu, MAX_DSP_MMU_DA -
+ CONFIG_TIDSPBRIDGE_DMM_SIZE, MAX_DSP_MMU_DA);
+ }
+ }
/* Lock the above TLB entries and get the BIOS and load monitor timer
* information */
if (!status) {
@@ -22,6 +22,9 @@
#include <plat/iommu.h>
#include <plat/iovmm.h>
+/* Last patch is not mapped to detect buffer overflow in DSP side */
+#define MAX_DSP_MMU_DA 0xFFFFF000
+
/**
* dsp_mmu_init() - initialize dsp_mmu module and returns a handle
*