From patchwork Wed Oct 20 15:22:49 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Guzman Lugo, Fernando" X-Patchwork-Id: 268691 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o9KFNOu0029695 for ; Wed, 20 Oct 2010 15:23:24 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753689Ab0JTPW6 (ORCPT ); Wed, 20 Oct 2010 11:22:58 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:50170 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753652Ab0JTPW5 convert rfc822-to-8bit (ORCPT ); Wed, 20 Oct 2010 11:22:57 -0400 Received: from dlep33.itg.ti.com ([157.170.170.112]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id o9KFMrx9006071 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 20 Oct 2010 10:22:53 -0500 Received: from dlep26.itg.ti.com (localhost [127.0.0.1]) by dlep33.itg.ti.com (8.13.7/8.13.7) with ESMTP id o9KFMqhL001782; Wed, 20 Oct 2010 10:22:52 -0500 (CDT) Received: from dlee73.ent.ti.com (localhost [127.0.0.1]) by dlep26.itg.ti.com (8.13.8/8.13.8) with ESMTP id o9KFMq2P004395; Wed, 20 Oct 2010 10:22:52 -0500 (CDT) Received: from dlee06.ent.ti.com ([157.170.170.11]) by dlee73.ent.ti.com ([157.170.170.88]) with mapi; Wed, 20 Oct 2010 10:22:52 -0500 From: "Guzman Lugo, Fernando" To: "felipe.contreras@gmail.com" CC: "Hiroshi.DOYU@nokia.com" , "felipe.contreras@nokia.com" , "david.cohen@nokia.com" , "linux-kernel@vger.kernel.org" , "linux-omap@vger.kernel.org" Date: Wed, 20 Oct 2010 10:22:49 -0500 Subject: RE: [PATCHv4 4/4] iommu: create new api to set valid da range Thread-Topic: [PATCHv4 4/4] iommu: create new api to set valid da range Thread-Index: ActwMc5BOuU3bOZ7QL63DnGIeA4L7wANmd3A Message-ID: <496565EC904933469F292DDA3F1663E602F4935CD8@dlee06.ent.ti.com> References: <1287542932-14206-1-git-send-email-x0095840@ti.com> <1287542932-14206-2-git-send-email-x0095840@ti.com> <1287542932-14206-3-git-send-email-x0095840@ti.com> <1287542932-14206-4-git-send-email-x0095840@ti.com> <1287542932-14206-5-git-send-email-x0095840@ti.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: acceptlanguage: en-US MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Wed, 20 Oct 2010 15:23:25 +0000 (UTC) diff --git a/drivers/staging/tidspbridge/Kconfig b/drivers/staging/tidspbridge/Kconfig index 672008f..37e47f5 100644 --- a/drivers/staging/tidspbridge/Kconfig +++ b/drivers/staging/tidspbridge/Kconfig @@ -42,6 +42,14 @@ config TIDSPBRIDGE_MEMPOOL_SIZE Allocate specified size of memory at booting time to avoid allocation failure under heavy memory fragmentation after some use time. +config TIDSPBRIDGE_DMM_SIZE + hex "DMM capable memory size (Byte)" + depends on TIDSPBRIDGE + default "0x10000000" + help + Memory size of DSP virtural address for Dynamic Memory Mapping. + Please make sure the size is 4K aligned. + config TIDSPBRIDGE_DEBUG bool "Debug Support" depends on TIDSPBRIDGE diff --git a/drivers/staging/tidspbridge/core/tiomap3430.c b/drivers/staging/tidspbridge/core/tiomap3430.c index c28dcf1..31f1dd6 100644 --- a/drivers/staging/tidspbridge/core/tiomap3430.c +++ b/drivers/staging/tidspbridge/core/tiomap3430.c @@ -345,7 +345,6 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt, OMAP343X_CONTROL_IVA2_BOOTMOD)); } } - if (!status) { (*pdata->dsp_prm_rmw_bits)(OMAP3430_RST2_IVA2_MASK, 0, OMAP3430_IVA2_MOD, OMAP2_RM_RSTCTRL); @@ -362,6 +361,11 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt, if (!status) { dev_context->dsp_mmu = mmu; sm_sg = &dev_context->sh_s; + /* Set valid range to map shared memory */ + status = iommu_set_da_range(mmu, sm_sg->seg0_da, + sm_sg->seg1_da + sm_sg->seg1_size); + } + if (!status) { sg0_da = iommu_kmap(mmu, sm_sg->seg0_da, sm_sg->seg0_pa, sm_sg->seg0_size, IOVMF_ENDIAN_LITTLE | IOVMF_ELSZ_32); if (IS_ERR_VALUE(sg0_da)) { @@ -411,7 +415,17 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt, l4_i++; } } - + if (!status) { + /* Set valid range for DMM mapings */ + if (MAX_DSP_MMU_DA - CONFIG_TIDSPBRIDGE_DMM_SIZE < + sm_sg->seg1_da + sm_sg->seg1_size) { + dev_err(bridge, "DMM size too big!\n"); + status = -ENOMEM; + } else { + status = iommu_set_da_range(mmu, MAX_DSP_MMU_DA - + CONFIG_TIDSPBRIDGE_DMM_SIZE, MAX_DSP_MMU_DA); + } + } /* Lock the above TLB entries and get the BIOS and load monitor timer * information */ if (!status) { diff --git a/drivers/staging/tidspbridge/include/dspbridge/dsp-mmu.h b/drivers/staging/tidspbridge/include/dspbridge/dsp-mmu.h index cb38d4c..bbbe9e6 100644 --- a/drivers/staging/tidspbridge/include/dspbridge/dsp-mmu.h +++ b/drivers/staging/tidspbridge/include/dspbridge/dsp-mmu.h @@ -22,6 +22,9 @@ #include #include +/* Last patch is not mapped to detect buffer overflow in DSP side */ +#define MAX_DSP_MMU_DA 0xFFFFF000 + /** * dsp_mmu_init() - initialize dsp_mmu module and returns a handle *