From patchwork Thu Dec 12 13:39:26 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Denis CIOCCA X-Patchwork-Id: 3331941 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B565F9F374 for ; Thu, 12 Dec 2013 13:40:17 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A2A18207E3 for ; Thu, 12 Dec 2013 13:40:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 73C18207DD for ; Thu, 12 Dec 2013 13:40:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751836Ab3LLNjt (ORCPT ); Thu, 12 Dec 2013 08:39:49 -0500 Received: from eu1sys200aog111.obsmtp.com ([207.126.144.131]:36907 "EHLO eu1sys200aog111.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751807Ab3LLNjs convert rfc822-to-8bit (ORCPT ); Thu, 12 Dec 2013 08:39:48 -0500 Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob111.postini.com ([207.126.147.11]) with SMTP ID DSNKUqm8oS1UPvOgHOrRviaXR69bs4LdsWKs@postini.com; Thu, 12 Dec 2013 13:39:48 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 09566E4; Thu, 12 Dec 2013 13:39:01 +0000 (GMT) Received: from Webmail-eu.st.com (safex1hubcas3.st.com [10.75.90.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 3E4EF566F; Thu, 12 Dec 2013 13:26:05 +0000 (GMT) Received: from SAFEX1MAIL1.st.com ([10.75.90.1]) by SAFEX1HUBCAS3.st.com ([10.75.90.18]) with mapi; Thu, 12 Dec 2013 14:39:39 +0100 From: Denis CIOCCA To: Nishanth Menon Cc: "linux-omap@vger.kernel.org" Date: Thu, 12 Dec 2013 14:39:26 +0100 Subject: Re: need help to configure IRQ on gpio 139 pandaboard using device tree Thread-Topic: need help to configure IRQ on gpio 139 pandaboard using device tree Thread-Index: Ac73P5rPce5eQsxBSTOlMVoWBsovuQ== Message-ID: <52A9BC8E.9090007@st.com> References: <52A8768C.5070103@st.com> <52A89206.8080605@st.com> <52A8A1A1.9090104@ti.com> In-Reply-To: <52A8A1A1.9090104@ti.com> Accept-Language: it-IT, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: user-agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.1.1 acceptlanguage: it-IT, en-US MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi Nishant, I've configured the device tree as you told me. Now, my device tree code is that: I've also read the documentation file Documentation/devicetree/bindings/interrupt-controller/interrupts.txt but I'm confused about the gpio muxed with mcspi1. Do you think my patch is correct? Thanks, Denis --- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/omap4-panda-es.dts b/arch/arm/boot/dts/omap4-panda-es.dts index 816d1c9..5644260 100644 --- a/arch/arm/boot/dts/omap4-panda-es.dts +++ b/arch/arm/boot/dts/omap4-panda-es.dts @@ -41,6 +41,12 @@ 0xb6 (PIN_OUTPUT | MUX_MODE3) /* gpio_110 */ >; }; + + lsm6db0_pins: lsm6db0_pins { + pinctrl-single,pins = < + 0xfc (PIN_INPUT | MUX_MODE3) /* mcspi1_cs2.gpio_139 */ + >; + }; }; &led_wkgpio_pins { @@ -49,6 +55,22 @@ >; }; +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_pins>; + + clock-frequency = <400000>; + + lsm6db0@03 { + pinctrl-names = "default"; + pinctrl-0 = <&lsm6db0_pins>; + compatible = "st,lsm6db0"; + reg = <0x03>; + interrupts = <139 0x1>; + interrupt-parent = <&lsm6db0_pins>; + }; +}; + &leds { pinctrl-0 = < &led_gpio_pins