diff mbox

[05/10] OMAP3: SR: Disable SR autocomp only for CORE trans

Message ID 5A47E75E594F054BAF48C5E4FC4B92AB02FB2518BE@dbde02.ent.ti.com (mailing list archive)
State Accepted
Delegated to: Kevin Hilman
Headers show

Commit Message

Rajendra Nayak April 15, 2009, 4:48 p.m. UTC 
Re-sending only this patch as the previous one in the patch-set had issues.

From: Rajendra Nayak <rnayak@ti.com>

This patch disables the Smartreflex auto compensation for
both VDD1 and VDD2 only during CORE transitions in idle path.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com>
---
 arch/arm/mach-omap2/pm34xx.c |   12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)

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diff mbox

Patch

Index: linux-omap-2.6/arch/arm/mach-omap2/pm34xx.c
===================================================================
--- linux-omap-2.6.orig/arch/arm/mach-omap2/pm34xx.c	2009-04-15 11:44:51.000000000 +0530
+++ linux-omap-2.6/arch/arm/mach-omap2/pm34xx.c	2009-04-15 11:46:13.000000000 +0530
@@ -349,9 +349,6 @@  void omap_sram_idle(void)
 		printk(KERN_ERR "Invalid mpu state in sram_idle\n");
 		return;
 	}
-	/* Disable smartreflex before entering WFI */
-	disable_smartreflex(SR1);
-	disable_smartreflex(SR2);
 
 	pwrdm_pre_transition();
 
@@ -380,6 +377,9 @@  void omap_sram_idle(void)
 
 	/* CORE */
 	if (core_next_state < PWRDM_POWER_ON) {
+		/* Disable smartreflex before entering WFI */
+		disable_smartreflex(SR1);
+		disable_smartreflex(SR2);
 		omap_uart_prepare_idle(0);
 		omap_uart_prepare_idle(1);
 		if (core_next_state == PWRDM_POWER_OFF) {
@@ -444,6 +444,9 @@  void omap_sram_idle(void)
 			prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF,
 					       OMAP3430_GR_MOD,
 					       OMAP3_PRM_VOLTCTRL_OFFSET);
+		/* Enable smartreflex after WFI */
+		enable_smartreflex(SR1);
+		enable_smartreflex(SR2);
 	}
 
 	/* PER */
@@ -466,9 +469,6 @@  void omap_sram_idle(void)
 		omap3_disable_io_chain();
 	}
 
-	/* Enable smartreflex after WFI */
-	enable_smartreflex(SR1);
-	enable_smartreflex(SR2);
 
 	pwrdm_post_transition();