From patchwork Tue Aug 21 09:43:20 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Afzal Mohammed X-Patchwork-Id: 1353461 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 919283FC81 for ; Tue, 21 Aug 2012 09:43:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755368Ab2HUJnh (ORCPT ); Tue, 21 Aug 2012 05:43:37 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:40139 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751817Ab2HUJng (ORCPT ); Tue, 21 Aug 2012 05:43:36 -0400 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id q7L9hSvk009838; Tue, 21 Aug 2012 04:43:29 -0500 Received: from DBDE70.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id q7L9h6YM017214; Tue, 21 Aug 2012 15:13:28 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by dbde70.ent.ti.com (172.24.170.148) with Microsoft SMTP Server id 14.1.323.3; Tue, 21 Aug 2012 15:13:21 +0530 Received: from udx0156546.apr.dhcp.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with ESMTP id q7L9hLUp028187; Tue, 21 Aug 2012 15:13:21 +0530 From: Afzal Mohammed To: , , , CC: , Afzal Mohammed Subject: [PATCH v3 04/10] ARM: OMAP2+: gpmc-nand: update resource with memory Date: Tue, 21 Aug 2012 15:13:20 +0530 Message-ID: <9bba62c4b9c19393c9fd16247fe7636124025218.1344609341.git.afzal@ti.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Currently omap nand driver uses a field in platform data - phys_base for passing the address space allocated by gpmc for nand. Use struct resource instead. With this change omap nand driver has to get address space from memory resource. This helps in smooth migration of gpmc to driver. Signed-off-by: Afzal Mohammed --- arch/arm/mach-omap2/gpmc-nand.c | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c index d4e803c..c0320d2 100644 --- a/arch/arm/mach-omap2/gpmc-nand.c +++ b/arch/arm/mach-omap2/gpmc-nand.c @@ -90,12 +90,14 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data) gpmc_nand_device.dev.platform_data = gpmc_nand_data; err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE, - &gpmc_nand_data->phys_base); + (unsigned long *)&gpmc_nand_resource.start); if (err < 0) { dev_err(dev, "Cannot request GPMC CS\n"); return err; } + gpmc_nand_resource.end = gpmc_nand_resource.start + NAND_IO_SIZE - 1; + /* Set timings in GPMC */ err = omap2_nand_gpmc_retime(gpmc_nand_data); if (err < 0) {