[1/1] omap3: Add macros for comparing si revision

Message ID	B85A65D85D7EB246BE421B3FB0FBB59301E1EB4A3E@dbde02.ent.ti.com (mailing list archive)
State	Changes Requested, archived
Headers	show Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.2) with ESMTP id o0BGYW88017689 for <patchwork-omap@patchwork.kernel.org>; Mon, 11 Jan 2010 16:34:32 GMT From: "Premi, Sanjeev" <premi@ti.com> To: "linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org> Date: Mon, 11 Jan 2010 22:04:10 +0530 Subject: RE: [PATCH 1/1] omap3: Add macros for comparing si revision Thread-Topic: [PATCH 1/1] omap3: Add macros for comparing si revision Thread-Index: AcqQdusognUQesRDQ72Q4NBdg046iQCZEI8Q Message-ID: <B85A65D85D7EB246BE421B3FB0FBB59301E1EB4A3E@dbde02.ent.ti.com> In-Reply-To: <1262964375-21873-1-git-send-email-premi@ti.com> Accept-Language: en-US Content-Language: en-US acceptlanguage: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk

diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index 7898e20..797d2de 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -202,7 +202,7 @@ int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate) * on 3430ES1 prevents us from changing DPLL multipliers or dividers * on DPLL4. */ - if (cpu_is_omap34xx() && omap_rev_is_1_0()) { + if (!cpu_is_omap3630() && cpu_is_omap34xx() && omap_rev_is_1_0()) { printk(KERN_ERR "clock: DPLL4 cannot change rate due to " "silicon 'Limitation 2.5' on 3430ES1.\n"); return -EINVAL; diff --git a/arch/arm/mach-omap2/clock34xx_data.c b/arch/arm/mach-omap2/clock34xx_data.c index 003362c..76dc05a 100644 --- a/arch/arm/mach-omap2/clock34xx_data.c +++ b/arch/arm/mach-omap2/clock34xx_data.c @@ -3324,7 +3324,7 @@ int __init omap2_clk_init(void) * Update this if there are further clock changes between ES2 * and production parts */ - if (cpu_is_omap34xx() && omap_rev_is_1_0()) { + if (!cpu_is_omap3630() && cpu_is_omap34xx() && omap_rev_is_1_0()) { /* No 3430ES1-only rates exist, so no RATE_IN_3430ES1 */ cpu_clkflg |= CK_3430ES1; } else { @@ -3376,7 +3376,7 @@ int __init omap2_clk_init(void) /* * Lock DPLL5 and put it in autoidle. */ - if ((cpu_is_omap34xx() && omap_rev_ge_2_0()) + if ((!cpu_is_omap3630() && cpu_is_omap34xx() && omap_rev_ge_2_0()) || cpu_is_omap3505() || cpu_is_omap3517() || cpu_is_omap3630()) omap3_clk_lock_dpll5(); diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index 3d8838b..2412ef8 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -215,7 +215,7 @@ void omap3_save_scratchpad_contents(void) /* Populate the Scratchpad contents */ scratchpad_contents.boot_config_ptr = 0x0; - if (cpu_is_omap34xx() && omap_rev_le_3_0()) + if (!cpu_is_omap3630() && cpu_is_omap34xx() && omap_rev_le_3_0()) scratchpad_contents.public_restore_ptr = virt_to_phys(get_restore_pointer()); else @@ -276,7 +276,7 @@ void omap3_save_scratchpad_contents(void) * of AUTO_CNT = 1 prior to any transition to OFF mode. */ if ((omap_type() != OMAP2_DEVICE_TYPE_GP) - && ((cpu_is_omap34xx() && omap_rev_ge_3_0()) + && ((!cpu_is_omap3630() && cpu_is_omap34xx() && omap_rev_ge_3_0()) || cpu_is_omap3505() || cpu_is_omap3517() || cpu_is_omap3630())) sdrc_block_contents.power = (sdrc_read_reg(SDRC_POWER) & diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 27b32b0..239f5c4 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -126,7 +126,7 @@ static void omap3_enable_io_chain(void) { int timeout = 0; - if ((cpu_is_omap34xx() && omap_rev_ge_3_1()) + if ((!cpu_is_omap3630() && cpu_is_omap34xx() && omap_rev_ge_3_1()) || cpu_is_omap3505() || cpu_is_omap3517() || cpu_is_omap3630()) { prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN, WKUP_MOD, PM_WKEN); @@ -149,7 +149,7 @@ static void omap3_enable_io_chain(void) static void omap3_disable_io_chain(void) { - if ((cpu_is_omap34xx() && omap_rev_ge_3_1()) + if ((!cpu_is_omap3630() && cpu_is_omap34xx() && omap_rev_ge_3_1()) || cpu_is_omap3505() || cpu_is_omap3517() || cpu_is_omap3630()) prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN, WKUP_MOD, PM_WKEN); @@ -279,7 +279,7 @@ static int _prcm_int_handle_wakeup(void) c += prcm_clear_mod_irqs(CORE_MOD, 1); c += prcm_clear_mod_irqs(OMAP3430_PER_MOD, 1); - if ((cpu_is_omap34xx() && omap_rev_gt_1_0()) + if ((!cpu_is_omap3630() && cpu_is_omap34xx() && omap_rev_gt_1_0()) || cpu_is_omap3505() || cpu_is_omap3517() || cpu_is_omap3630()) { c += prcm_clear_mod_irqs(CORE_MOD, 3); @@ -472,7 +472,7 @@ void omap_sram_idle(void) * of AUTO_CNT = 1 enabled. This takes care of errata 1.142. * Hence store/restore the SDRC_POWER register here. */ - if (((cpu_is_omap34xx() && omap_rev_ge_3_0()) + if (((!cpu_is_omap3630() && cpu_is_omap34xx() && omap_rev_ge_3_0()) || cpu_is_omap3505() || cpu_is_omap3517() || cpu_is_omap3630()) && omap_type() != OMAP2_DEVICE_TYPE_GP && @@ -494,7 +494,7 @@ void omap_sram_idle(void) pm_dbg_regset_save(2); /* Restore normal SDRC POWER settings */ - if (((cpu_is_omap34xx() && omap_rev_ge_3_0()) + if (((!cpu_is_omap3630() && cpu_is_omap34xx() && omap_rev_ge_3_0()) || cpu_is_omap3505() || cpu_is_omap3517() || cpu_is_omap3630()) && omap_type() != OMAP2_DEVICE_TYPE_GP && @@ -847,7 +847,7 @@ static void __init prcm_setup_regs(void) prm_write_mod_reg(0, OMAP3430_CAM_MOD, PM_WKDEP); prm_write_mod_reg(0, OMAP3430_PER_MOD, PM_WKDEP); - if ((cpu_is_omap34xx() && omap_rev_gt_1_0()) + if ((!cpu_is_omap3630() && cpu_is_omap34xx() && omap_rev_gt_1_0()) || cpu_is_omap3505() || cpu_is_omap3517() || cpu_is_omap3630()) { prm_write_mod_reg(0, OMAP3430ES2_SGX_MOD, PM_WKDEP); @@ -900,7 +900,7 @@ static void __init prcm_setup_regs(void) OMAP3430_AUTO_DES1, CORE_MOD, CM_AUTOIDLE2); - if ((cpu_is_omap34xx() && omap_rev_gt_1_0()) + if ((!cpu_is_omap3630() && cpu_is_omap34xx() && omap_rev_gt_1_0()) || cpu_is_omap3505() || cpu_is_omap3517() || cpu_is_omap3630()) { cm_write_mod_reg( @@ -950,7 +950,7 @@ static void __init prcm_setup_regs(void) OMAP3430_PER_MOD, CM_AUTOIDLE); - if ((cpu_is_omap34xx() && omap_rev_gt_1_0()) + if ((!cpu_is_omap3630() && cpu_is_omap34xx() && omap_rev_gt_1_0()) || cpu_is_omap3505() || cpu_is_omap3517() || cpu_is_omap3630()) { cm_write_mod_reg(

[1/1] omap3: Add macros for comparing si revision

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