From patchwork Sat Oct 6 12:46:48 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Russell King X-Patchwork-Id: 1557531 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 168D23FD56 for ; Sat, 6 Oct 2012 12:46:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755726Ab2JFMq6 (ORCPT ); Sat, 6 Oct 2012 08:46:58 -0400 Received: from caramon.arm.linux.org.uk ([78.32.30.218]:47348 "EHLO caramon.arm.linux.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752339Ab2JFMq5 (ORCPT ); Sat, 6 Oct 2012 08:46:57 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=arm.linux.org.uk; s=caramon; h=Date:Sender:Message-Id:Subject:Cc:To:From:References:In-Reply-To; bh=y++PKSrvlrRQNSryTJ8rBJC+Z4OD9Pb5mP+wHKN9hFc=; b=ED6tvg0616CqBgYg97ozefJe/et3Uqb0AxuMbN8rPBifMeX789xCkGkM31m2Ist4v8gnaWN/4sKEEaWmG0REw0nuQE6P2PWaACfxQAeM+fm+Q2MkDU5zRn4+iZTbrOKX8+LvfytEdLlTLNjtyayHvy8gNJeE3A06nyMCsBL/N3M=; Received: from e0022681537dd.dyn.arm.linux.org.uk ([2002:4e20:1eda:1:222:68ff:fe15:37dd]:39614 helo=rmk-PC.arm.linux.org.uk) by caramon.arm.linux.org.uk with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.76) (envelope-from ) id 1TKTmK-0008AN-Hq; Sat, 06 Oct 2012 13:46:48 +0100 Received: from rmk by rmk-PC.arm.linux.org.uk with local (Exim 4.76) (envelope-from ) id 1TKTmK-0002nu-1Q; Sat, 06 Oct 2012 13:46:48 +0100 In-Reply-To: <20121006123803.GD15246@n2100.arm.linux.org.uk> References: <20121006123803.GD15246@n2100.arm.linux.org.uk> From: Russell King To: Tony Lindgren , Alan Cox , Greg Kroah-Hartman Cc: linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, linux-serial@vger.kernel.org Subject: [RFC 23/24] SERIAL: omap: move driver private definitions and structures to driver Message-Id: Date: Sat, 06 Oct 2012 13:46:48 +0100 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org struct uart_omap_port and struct uart_omap_dma, and associated definitions are private to the driver, so there's no point them sitting in an include file under arch/arm. Move them into the driver itself. Signed-off-by: Russell King --- arch/arm/plat-omap/include/plat/omap-serial.h | 87 ------------------------ drivers/tty/serial/omap-serial.c | 88 +++++++++++++++++++++++++ 2 files changed, 88 insertions(+), 87 deletions(-) diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h index 6403441..bad00f1 100644 --- a/arch/arm/plat-omap/include/plat/omap-serial.h +++ b/arch/arm/plat-omap/include/plat/omap-serial.h @@ -32,35 +32,9 @@ */ #define OMAP_SERIAL_NAME "ttyO" -#define OMAP_MODE13X_SPEED 230400 - -#define OMAP_UART_SCR_TX_EMPTY 0x08 - -/* WER = 0x7F - * Enable module level wakeup in WER reg - */ -#define OMAP_UART_WER_MOD_WKUP 0X7F - -/* Enable XON/XOFF flow control on output */ -#define OMAP_UART_SW_TX 0x08 - -/* Enable XON/XOFF flow control on input */ -#define OMAP_UART_SW_RX 0x02 - #define OMAP_UART_SYSC_RESET 0X07 -#define OMAP_UART_TCR_TRIG 0X0F -#define OMAP_UART_SW_CLR 0XF0 #define OMAP_UART_FIFO_CLR 0X06 -#define OMAP_UART_DMA_CH_FREE -1 - -#define OMAP_MAX_HSUART_PORTS 4 - -#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA - -#define UART_ERRATA_i202_MDR1_ACCESS BIT(0) -#define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1) - struct omap_uart_port_info { bool dma_enabled; /* To specify DMA Mode */ unsigned int uartclk; /* UART clock rate */ @@ -76,65 +50,4 @@ struct omap_uart_port_info { void (*enable_wakeup)(struct platform_device *, bool); }; -struct uart_omap_dma { - u8 uart_dma_tx; - u8 uart_dma_rx; - int rx_dma_channel; - int tx_dma_channel; - dma_addr_t rx_buf_dma_phys; - dma_addr_t tx_buf_dma_phys; - unsigned int uart_base; - /* - * Buffer for rx dma.It is not required for tx because the buffer - * comes from port structure. - */ - unsigned char *rx_buf; - unsigned int prev_rx_dma_pos; - int tx_buf_size; - int tx_dma_used; - int rx_dma_used; - spinlock_t tx_lock; - spinlock_t rx_lock; - /* timer to poll activity on rx dma */ - struct timer_list rx_timer; - unsigned int rx_buf_size; - unsigned int rx_poll_rate; - unsigned int rx_timeout; -}; - -struct uart_omap_port { - struct uart_port port; - struct uart_omap_dma uart_dma; - struct platform_device *pdev; - - unsigned char ier; - unsigned char lcr; - unsigned char mcr; - unsigned char fcr; - unsigned char efr; - unsigned char dll; - unsigned char dlh; - unsigned char mdr1; - unsigned char scr; - - int use_dma; - /* - * Some bits in registers are cleared on a read, so they must - * be saved whenever the register is read but the bits will not - * be immediately processed. - */ - unsigned int lsr_break_flag; - unsigned char msr_saved_flags; - char name[20]; - unsigned long port_activity; - u32 context_loss_cnt; - u32 errata; - u8 wakeups_enabled; - - struct pm_qos_request pm_qos_request; - u32 latency; - u32 calc_latency; - struct work_struct qos_work; -}; - #endif /* __OMAP_SERIAL_H__ */ diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index a5482da..fad157c 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c @@ -44,6 +44,8 @@ #include #include +#define OMAP_MAX_HSUART_PORTS 4 + #define UART_BUILD_REVISION(x, y) (((x) << 8) | (y)) #define OMAP_UART_REV_42 0x0402 @@ -51,6 +53,9 @@ #define OMAP_UART_REV_52 0x0502 #define OMAP_UART_REV_63 0x0603 +#define UART_ERRATA_i202_MDR1_ACCESS BIT(0) +#define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1) + #define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/ /* SCR register bitmasks */ @@ -71,6 +76,89 @@ #define OMAP_UART_MVR_MAJ_SHIFT 8 #define OMAP_UART_MVR_MIN_MASK 0x3f +#define OMAP_UART_DMA_CH_FREE -1 + +#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA +#define OMAP_MODE13X_SPEED 230400 + +#define OMAP_UART_SCR_TX_EMPTY 0x08 + +/* WER = 0x7F + * Enable module level wakeup in WER reg + */ +#define OMAP_UART_WER_MOD_WKUP 0X7F + +/* Enable XON/XOFF flow control on output */ +#define OMAP_UART_SW_TX 0x08 + +/* Enable XON/XOFF flow control on input */ +#define OMAP_UART_SW_RX 0x02 + +#define OMAP_UART_SW_CLR 0xF0 + +#define OMAP_UART_TCR_TRIG 0x0F + +struct uart_omap_dma { + u8 uart_dma_tx; + u8 uart_dma_rx; + int rx_dma_channel; + int tx_dma_channel; + dma_addr_t rx_buf_dma_phys; + dma_addr_t tx_buf_dma_phys; + unsigned int uart_base; + /* + * Buffer for rx dma.It is not required for tx because the buffer + * comes from port structure. + */ + unsigned char *rx_buf; + unsigned int prev_rx_dma_pos; + int tx_buf_size; + int tx_dma_used; + int rx_dma_used; + spinlock_t tx_lock; + spinlock_t rx_lock; + /* timer to poll activity on rx dma */ + struct timer_list rx_timer; + unsigned int rx_buf_size; + unsigned int rx_poll_rate; + unsigned int rx_timeout; +}; + +struct uart_omap_port { + struct uart_port port; + struct uart_omap_dma uart_dma; + struct platform_device *pdev; + + unsigned char ier; + unsigned char lcr; + unsigned char mcr; + unsigned char fcr; + unsigned char efr; + unsigned char dll; + unsigned char dlh; + unsigned char mdr1; + unsigned char scr; + + int use_dma; + /* + * Some bits in registers are cleared on a read, so they must + * be saved whenever the register is read but the bits will not + * be immediately processed. + */ + unsigned int lsr_break_flag; + unsigned char msr_saved_flags; + char name[20]; + unsigned long port_activity; + u32 context_loss_cnt; + u32 errata; + u8 wakeups_enabled; + + struct pm_qos_request pm_qos_request; + u32 latency; + u32 calc_latency; + struct work_struct qos_work; +}; + static struct uart_omap_port *serial_omap_port(struct uart_port *port) { return container_of(port, struct uart_omap_port, port);