From patchwork Fri Oct 30 21:33:29 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: HU TAO-TGHK48 X-Patchwork-Id: 56703 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n9ULXxxc025034 for ; Fri, 30 Oct 2009 21:34:00 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757433AbZJ3Vdy (ORCPT ); Fri, 30 Oct 2009 17:33:54 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1757449AbZJ3Vdy (ORCPT ); Fri, 30 Oct 2009 17:33:54 -0400 Received: from mail119.messagelabs.com ([216.82.241.195]:34249 "EHLO mail119.messagelabs.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756744AbZJ3Vdx convert rfc822-to-8bit (ORCPT ); Fri, 30 Oct 2009 17:33:53 -0400 X-VirusChecked: Checked X-Env-Sender: taohu@motorola.com X-Msg-Ref: server-9.tower-119.messagelabs.com!1256938436!34716517!1 X-StarScan-Version: 6.1.3; banners=-,-,- X-Originating-IP: [129.188.136.8] Received: (qmail 27937 invoked from network); 30 Oct 2009 21:33:56 -0000 Received: from motgate8.mot.com (HELO motgate8.mot.com) (129.188.136.8) by server-9.tower-119.messagelabs.com with DHE-RSA-AES256-SHA encrypted SMTP; 30 Oct 2009 21:33:56 -0000 Received: from il06exr03.mot.com (il06exr03.mot.com [129.188.137.133]) by motgate8.mot.com (8.14.3/8.14.3) with ESMTP id n9ULXsH5007954 for ; Fri, 30 Oct 2009 14:33:56 -0700 (MST) Received: from il06vts04.mot.com (il06vts04.mot.com [129.188.137.144]) by il06exr03.mot.com (8.13.1/Vontu) with SMTP id n9ULXslN017507 for ; Fri, 30 Oct 2009 16:33:54 -0500 (CDT) Received: from ZMY16EXM66.ds.mot.com (zmy16exm66.ap.mot.com [10.179.4.26]) by il06exr03.mot.com (8.13.1/8.13.0) with ESMTP id n9ULXqsX017495 for ; Fri, 30 Oct 2009 16:33:53 -0500 (CDT) X-MimeOLE: Produced By Microsoft Exchange V6.5 Content-class: urn:content-classes:message MIME-Version: 1.0 Subject: RE: [PATCH] Fix race condition in omap_request_dma() Date: Sat, 31 Oct 2009 05:33:29 +0800 Message-ID: In-Reply-To: <618f0c910910301022m313cc0f3sb3f1f3439571d950@mail.gmail.com> X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: [PATCH] Fix race condition in omap_request_dma() thread-index: AcpZhY5u4WtQfM6fRJ2plYEScs93dQAIn6Xw References: <618f0c910910301022m313cc0f3sb3f1f3439571d950@mail.gmail.com> From: "HU TAO-TGHK48" To: "Venkatraman S" Cc: , "Tony Lindgren" , "Yang Fei-AFY095" , , "Zhou Ming-a17711" , "Ye Yuan.Bo-A22116" X-CFilter-Loop: Reflected Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index cd53b28..5767899 100755 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -673,13 +673,16 @@ static inline void disable_lnk(int lch) static inline void omap2_enable_irq_lch(int lch) { u32 val; + unsigned long flags; if (!cpu_class_is_omap2()) return; + spin_lock_irqsave(&dma_chan_lock, flags); val = dma_read(IRQENABLE_L0); val |= 1 << lch; dma_write(val, IRQENABLE_L0); + spin_unlock_irqrestore(&dma_chan_lock, flags); } int omap_request_dma(int dev_id, const char *dev_name, @@ -788,10 +791,13 @@ void omap_free_dma(int lch) if (cpu_class_is_omap2()) { u32 val; + + spin_lock_irqsave(&dma_chan_lock, flags); /* Disable interrupts */ val = dma_read(IRQENABLE_L0); val &= ~(1 << lch); dma_write(val, IRQENABLE_L0); + spin_unlock_irqrestore(&dma_chan_lock, flags); /* Clear the CSR register and IRQ status register */ dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(lch));