From patchwork Tue Mar 1 08:25:58 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Walmsley X-Patchwork-Id: 8463051 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C785EC0553 for ; Tue, 1 Mar 2016 08:26:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id EE37320295 for ; Tue, 1 Mar 2016 08:26:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0C4D6201F4 for ; Tue, 1 Mar 2016 08:26:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752090AbcCAI0A (ORCPT ); Tue, 1 Mar 2016 03:26:00 -0500 Received: from utopia.booyaka.com ([74.50.51.50]:41988 "EHLO utopia.booyaka.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751200AbcCAIZ7 (ORCPT ); Tue, 1 Mar 2016 03:25:59 -0500 Received: (qmail 25380 invoked by uid 1019); 1 Mar 2016 08:25:58 -0000 Date: Tue, 1 Mar 2016 08:25:58 +0000 (UTC) From: Paul Walmsley To: Kishon Vijay Abraham I cc: Sekhar Nori , Suman Anna , d-gerlach@ti.com, Tony Lindgren , Bjorn Helgaas , richardcochran@gmail.com, Russell King , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 3/3] pci: dra7xx: use pdata callbacks to perform reset In-Reply-To: <56CD4BE1.3010701@ti.com> Message-ID: References: <1452780672-14339-1-git-send-email-kishon@ti.com> <1452780672-14339-4-git-send-email-kishon@ti.com> <20160127173104.GQ19432@atomide.com> <56A90971.4020409@ti.com> <20160127185649.GV19432@atomide.com> <56A94FB7.6020903@ti.com> <20160128183156.GH19432@atomide.com> <56B087AD.4000505@ti.com> <56B900E9.9040306@ti.com> <56BA2495.9020407@ti.com> <56BA958A.1020503@ti.com> <56BACCDB.2070507@ti.com> <56BD8091.4090007@ti.com> <56BE1454.3030002@ti.com> <56C5D377.50901@ti.com> <56CAA82D.6000507@ti.com> <56CADB23.8020202@ti.com> <56CC490F.3040301@ti.com> <56CD4BE1.3010701@ti.com> User-Agent: Alpine 2.02 (DEB 1266 2009-07-14) MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Folks, the following is what I've queued for this. - Paul From: Sekhar Nori Date: Thu, 18 Feb 2016 16:49:56 +0530 Subject: [PATCH] ARM: DRA7: hwmod: Add custom reset handler for PCIeSS Add a custom reset handler for DRA7x PCIeSS. This handler is required to deassert PCIe hardreset lines after they have been asserted. This enables the PCIe driver to access registers after PCIeSS has been runtime enabled without having to deassert hardreset lines itself. With this patch applied, used lspci to make sure connected PCIe device enumerates on DRA74x and DRA72x EVMs. Signed-off-by: Sekhar Nori Reported-by: Richard Cochran Tested-by: Kishon Vijay Abraham I Cc: Suman Anna Cc: Dave Gerlach Cc: Tony Lindgren Cc: Bjorn Helgaas Cc: Russell King Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index b61355e2a771..252b74633e31 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c @@ -1526,8 +1526,31 @@ static struct omap_hwmod dra7xx_ocp2scp3_hwmod = { * */ +/* + * As noted in documentation for _reset() in omap_hwmod.c, the stock reset + * functionality of OMAP HWMOD layer does not deassert the hardreset lines + * associated with an IP automatically leaving the driver to handle that + * by itself. This does not work for PCIeSS which needs the reset lines + * deasserted for the driver to start accessing registers. + * + * We use a PCIeSS HWMOD class specific reset handler to deassert the hardreset + * lines after asserting them. + */ +static int dra7xx_pciess_reset(struct omap_hwmod *oh) +{ + int i; + + for (i = 0; i < oh->rst_lines_cnt; i++) { + omap_hwmod_assert_hardreset(oh, oh->rst_lines[i].name); + omap_hwmod_deassert_hardreset(oh, oh->rst_lines[i].name); + } + + return 0; +} + static struct omap_hwmod_class dra7xx_pciess_hwmod_class = { .name = "pcie", + .reset = dra7xx_pciess_reset, }; /* pcie1 */