From patchwork Tue Jul 4 10:53:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sekhar Nori X-Patchwork-Id: 9824565 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DD0CB60237 for ; Tue, 4 Jul 2017 10:54:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CD3FE25F31 for ; Tue, 4 Jul 2017 10:54:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C19242844E; Tue, 4 Jul 2017 10:54:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 27CF225F31 for ; Tue, 4 Jul 2017 10:54:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752550AbdGDKyJ (ORCPT ); Tue, 4 Jul 2017 06:54:09 -0400 Received: from fllnx210.ext.ti.com ([198.47.19.17]:35068 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752314AbdGDKyI (ORCPT ); Tue, 4 Jul 2017 06:54:08 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id v64ArgJ4011971; Tue, 4 Jul 2017 05:53:42 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1499165622; bh=PyElrnXLr3NOYapHIJFVU0MTqvvZcbEHOFHDMIvzT+8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ibkrf/n8zf1YVArKtLrtqlvp19jO6rNCoasLyIVGG6o9EWo0Fuo5VgqSRYbrHf5j2 AIBN/FFetJ8qDhYnhiu6Ijyerh19JJXpazsaSt/HtMEFfApTtKL/zmxsS/t6GsGYxD vFPChDxvNI7cqsCCItMU6m8Vk2wzqj5ezzqKrEIg= Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v64Arga4030256; Tue, 4 Jul 2017 05:53:42 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Tue, 4 Jul 2017 05:53:42 -0500 Received: from psplinux063.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v64ArOS9003583; Tue, 4 Jul 2017 05:53:37 -0500 From: Sekhar Nori To: Rob Herring , Mark Rutland , Andrew Lunn , Florian Fainelli CC: Device Tree Mailing List , "David S . Miller" , , Tony Lindgren , Linux OMAP Mailing List , Grygorii Strashko , Murali Karicheri , Sekhar Nori Subject: [PATCH 2/2] net: phy: dp83867: add workaround for incorrect RX_CTRL pin strap Date: Tue, 4 Jul 2017 16:23:24 +0530 Message-ID: X-Mailer: git-send-email 2.9.0 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Murali Karicheri The data manual for DP83867IR/CR, SNLS484E[1], revised march 2017, advises that strapping RX_DV/RX_CTRL pin in mode 1 and 2 is not supported (see note below Table 5 (4-Level Strap Pins)). There are some boards which have the pin strapped this way and need software workaround suggested by the data manual. Bit[7] of Configuration Register 4 (address 0x0031) must be cleared to 0. This ensures proper operation of the PHY. Implement driver support for device-tree property meant to advertise the wrong strapping. [1] http://www.ti.com/lit/ds/snls484e/snls484e.pdf Signed-off-by: Murali Karicheri [nsekhar@ti.com: rebase to mainline, code simplification] Signed-off-by: Sekhar Nori --- drivers/net/phy/dp83867.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c index b57f20e552ba..c1ab976cc800 100644 --- a/drivers/net/phy/dp83867.c +++ b/drivers/net/phy/dp83867.c @@ -91,6 +91,7 @@ struct dp83867_private { int fifo_depth; int io_impedance; int port_mirroring; + bool rxctrl_strap_quirk; }; static int dp83867_ack_interrupt(struct phy_device *phydev) @@ -164,6 +165,9 @@ static int dp83867_of_init(struct phy_device *phydev) else if (of_property_read_bool(of_node, "ti,min-output-impedance")) dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN; + dp83867->rxctrl_strap_quirk = of_property_read_bool(of_node, + "ti,dp83867-rxctrl-strap-quirk"); + ret = of_property_read_u32(of_node, "ti,rx-internal-delay", &dp83867->rx_id_delay); if (ret && @@ -214,6 +218,13 @@ static int dp83867_config_init(struct phy_device *phydev) dp83867 = (struct dp83867_private *)phydev->priv; } + /* RX_DV/RX_CTRL strapped in mode 1 or mode 2 workaround */ + if (dp83867->rxctrl_strap_quirk) { + val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4); + val &= ~BIT(7); + phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4, val); + } + if (phy_interface_is_rgmii(phydev)) { val = phy_read(phydev, MII_DP83867_PHYCTRL); if (val < 0)