From patchwork Mon Feb 22 23:25:59 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Carlos O'Donell X-Patchwork-Id: 81330 X-Patchwork-Delegate: kyle@mcmartin.ca Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o1MNQDi8025493 for ; Mon, 22 Feb 2010 23:26:14 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754846Ab0BVX0E (ORCPT ); Mon, 22 Feb 2010 18:26:04 -0500 Received: from mail-wy0-f174.google.com ([74.125.82.174]:51526 "EHLO mail-wy0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754883Ab0BVX0C (ORCPT ); Mon, 22 Feb 2010 18:26:02 -0500 Received: by wya21 with SMTP id 21so391470wya.19 for ; Mon, 22 Feb 2010 15:26:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:sender:received:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type; bh=N/gLxLZ+ACxsuz4EiGcqbcs/clR/LeadO33wJtAmqRM=; b=pV/vK6MFqdOp84R+zIpiDUkzoTE2RrAZAOp/XTyOOcVbvj1c9SwYiTlsSRSxCwG9zQ 31qsuQDmf9h8JVl2Gc1InfUQh2BZww1eCuFeepHgKCkvieVnMQdJkcIH57rrlPDPR94/ WP2NYSr6+hngiVM9st6jOks/tH7YOCenORjXQ= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:sender:date:x-google-sender-auth:message-id:subject :from:to:cc:content-type; b=o7bEd/Xa+PhNR0L0+DXSL0oR1cZP2Seavttco0sO01c9G35aR5x78TPJNplJse+5k8 HnDdq/+EPA6G4r/QQ/D50iJuYVJYAOnfxInOwUQ9yLlDCAIYHXxP7Sflp+HLzWEZQPQQ 5/lVWRxvn0pyV7XVUK8wjyXctblC3D3Kehln8= MIME-Version: 1.0 Received: by 10.216.86.211 with SMTP id w61mr1314603wee.50.1266881159848; Mon, 22 Feb 2010 15:25:59 -0800 (PST) Date: Mon, 22 Feb 2010 18:25:59 -0500 X-Google-Sender-Auth: d11d2f8227c3f489 Message-ID: <119aab441002221525m4595b37w875891cd8f95e633@mail.gmail.com> Subject: PCI patch breaks boot on rp2470 (2xPA8700) From: "Carlos O'Donell" To: Kyle McMartin , linux-parisc Cc: Grant Grundler , Matthew Wilcox Sender: linux-parisc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-parisc@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Mon, 22 Feb 2010 23:26:14 +0000 (UTC) Subject: [PATCH] hppa: Set PCI CLS early in boot. From: Carlos O'Donell Set the PCI CLS early in the boot process to prevent device failures. In pcibios_set_master use the new pci_cache_line_size instead of a hard-coded value. Signed-off-by: Carlos O'Donell --- arch/parisc/kernel/pci.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c index f7064ab..4f84991 100644 --- a/arch/parisc/kernel/pci.c +++ b/arch/parisc/kernel/pci.c @@ -18,7 +18,6 @@ #include #include -#include /* for L1_CACHE_BYTES */ #include #define DEBUG_RESOURCES 0 @@ -123,6 +122,10 @@ static int __init pcibios_init(void) } else { printk(KERN_WARNING "pci_bios != NULL but init() is!\n"); } + + /* Set the CLS for PCI as early as possible. */ + pci_cache_line_size = pci_dfl_cache_line_size; + return 0; } @@ -170,8 +173,8 @@ void pcibios_set_master(struct pci_dev *dev) ** HP generally has fewer devices on the bus than other architectures. ** upper byte is PCI_LATENCY_TIMER. */ - pci_write_config_word(dev, PCI_CACHE_LINE_SIZE, - (0x80 << 8) | (L1_CACHE_BYTES / sizeof(u32))); + pci_write_config_word(dev, PCI_CACHE_LINE_SIZE, + (0x80 << 8) | pci_cache_line_size); }