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[1/6] mm: add coherence API for DMA to vmalloc/vmap areas

Message ID 1258557217.2540.12.camel@mulgrave.site (mailing list archive)
State Superseded
Delegated to: kyle mcmartin
Headers show

Commit Message

James Bottomley Nov. 18, 2009, 3:13 p.m. UTC
None
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Patch

diff --git a/Documentation/cachetlb.txt b/Documentation/cachetlb.txt
index da42ab4..7d1055c 100644
--- a/Documentation/cachetlb.txt
+++ b/Documentation/cachetlb.txt
@@ -377,3 +377,27 @@  maps this page at its virtual address.
 	All the functionality of flush_icache_page can be implemented in
 	flush_dcache_page and update_mmu_cache. In 2.7 the hope is to
 	remove this interface completely.
+
+For machines where aliasing can be a problem, there exist two
+additional APIs to handle I/O to vmap/vmalloc areas within the
+kernel. These are areas that have two kernel mappings, one the regular
+page offset map through which the page has likely been previously
+accessed and the other, the new contiguous map in the kernel virtual
+map area.  This dual mapping sets up aliasing within the kernel and,
+in particular since all kernel flushing goes through the offset map,
+must be handled separately for I/O.  to declare your architecture as
+needing to use these functions, you must define
+ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE in asm/cacheflush.h and add two API
+helpers (usually as static inlines in cacheflush.h).  The two new APIs
+are:
+
+  void flush_kernel_dcache_addr(void *addr)
+       Flush a single page through the vmap alias for addr.  This is
+       usually executed prior to performing I/O on the page to make
+       sure the underlying physical page is up to date.
+
+  void invalidate_kernel_dcache_addr(void *addr)
+       Invalidate the page after I/O has completed.  This is necessary
+       on machines whose cache mechanisms might trigger cache movein
+       during I/O.  If you can ensure architecturally that this movein
+       never occurs, this function can be empty on your architecture.