From patchwork Mon Jul 13 01:44:37 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John David Anglin X-Patchwork-Id: 35310 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n6D1in6h030399 for ; Mon, 13 Jul 2009 01:44:49 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751842AbZGMBos (ORCPT ); Sun, 12 Jul 2009 21:44:48 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1751987AbZGMBos (ORCPT ); Sun, 12 Jul 2009 21:44:48 -0400 Received: from hiauly1.hia.nrc.ca ([132.246.100.193]:4670 "EHLO hiauly1.hia.nrc.ca" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751842AbZGMBos (ORCPT ); Sun, 12 Jul 2009 21:44:48 -0400 Received: by hiauly1.hia.nrc.ca (Postfix, from userid 1000) id 9CAB4505D; Sun, 12 Jul 2009 21:44:37 -0400 (EDT) Subject: Re: Wierd code in Entry.S To: kyle@mcmartin.ca (Kyle McMartin) Date: Sun, 12 Jul 2009 21:44:37 -0400 (EDT) From: "John David Anglin" Cc: James.Bottomley@HansenPartnership.com, grundler@parisc-linux.org, artem.alimarine@stromasys.com, linux-parisc@vger.kernel.org In-Reply-To: <20090713011549.GE31925@bombadil.infradead.org> from "Kyle McMartin" at Jul 12, 2009 09:15:49 pm X-Mailer: ELM [version 2.4 PL25] MIME-Version: 1.0 Message-Id: <20090713014438.9CAB4505D@hiauly1.hia.nrc.ca> Sender: linux-parisc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-parisc@vger.kernel.org > Can someone distill all these mails into a patch? It will directly apply > to upstream and all the current stable releases, so a single patch > should suffice. > > I'd do it myself, but I'm too busy writing a paper this week. :/ The most important change is attached. Bit 12 needs to be set in the protection register, not bit 44. The change has had three days testing on my rp3440 (PA8800) without any unusual segmentation faults. Also, tested on a couple of PA8700 machines. This fixes the problem noticed by Artem Alimarine. At the moment, I don't have a change for the macros. The DEP and DEPI macros conflict with PA 1.x mneumonics. So, they should be renamed. I also think the 32-bit instructions in the macros should use PA 1.x rather than 2.0 mneumonics. The 1.x mneumonics should be ok for both PA 1.x and 2.0. It is possible that building for a PA 1.x machine might not work with the current macros. Maybe James has something for the macros. Dave diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S index ae3e70c..e552e54 100644 --- a/arch/parisc/kernel/entry.S +++ b/arch/parisc/kernel/entry.S @@ -553,7 +553,7 @@ * on most of those machines only handles cache transactions. */ extrd,u,*= \pte,_PAGE_NO_CACHE_BIT+32,1,%r0 - depi 1,12,1,\prot + depdi 1,12,1,\prot /* Drop prot bits and convert to page addr for iitlbt and idtlbt */ convert_for_tlb_insert20 \pte