diff --git a/arch/parisc/include/asm/atomic.h b/arch/parisc/include/asm/atomic.h
index 118953d41763..0090c9606313 100644
--- a/arch/parisc/include/asm/atomic.h
+++ b/arch/parisc/include/asm/atomic.h
@@ -59,11 +59,11 @@ extern arch_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned;
 static __inline__ void atomic_set(atomic_t *v, int i)
 {
 	unsigned long flags;
-	_atomic_spin_lock_irqsave(v, flags);
+	volatile int *p = &v->counter;

-	v->counter = i;
-
-	_atomic_spin_unlock_irqrestore(v, flags);
+	_atomic_spin_lock_irqsave(p, flags);
+	*p = i;
+	_atomic_spin_unlock_irqrestore(p, flags);
 }

 #define atomic_set_release(v, i)	atomic_set((v), (i))
@@ -81,21 +81,23 @@ static __inline__ int atomic_read(const atomic_t *v)
 static __inline__ void atomic_##op(int i, atomic_t *v)			\
 {									\
 	unsigned long flags;						\
+	volatile int *p = &v->counter;					\
 									\
-	_atomic_spin_lock_irqsave(v, flags);				\
-	v->counter c_op i;						\
-	_atomic_spin_unlock_irqrestore(v, flags);			\
+	_atomic_spin_lock_irqsave(p, flags);				\
+	*p c_op i;							\
+	_atomic_spin_unlock_irqrestore(p, flags);			\
 }									\

 #define ATOMIC_OP_RETURN(op, c_op)					\
 static __inline__ int atomic_##op##_return(int i, atomic_t *v)		\
 {									\
 	unsigned long flags;						\
+	volatile int *p = &v->counter;					\
 	int ret;							\
 									\
-	_atomic_spin_lock_irqsave(v, flags);				\
-	ret = (v->counter c_op i);					\
-	_atomic_spin_unlock_irqrestore(v, flags);			\
+	_atomic_spin_lock_irqsave(p, flags);				\
+	ret = (*p c_op i);						\
+	_atomic_spin_unlock_irqrestore(p, flags);			\
 									\
 	return ret;							\
 }
@@ -104,12 +106,14 @@ static __inline__ int atomic_##op##_return(int i, atomic_t *v)		\
 static __inline__ int atomic_fetch_##op(int i, atomic_t *v)		\
 {									\
 	unsigned long flags;						\
-	int ret;							\
+	volatile int *p = &v->counter;					\
+	int ret, tmp;							\
 									\
-	_atomic_spin_lock_irqsave(v, flags);				\
-	ret = v->counter;						\
-	v->counter c_op i;						\
-	_atomic_spin_unlock_irqrestore(v, flags);			\
+	_atomic_spin_lock_irqsave(p, flags);				\
+	ret = *p;							\
+	tmp = ret;							\
+	*p = (tmp c_op i);						\
+	_atomic_spin_unlock_irqrestore(p, flags);			\
 									\
 	return ret;							\
 }
@@ -146,21 +150,23 @@ ATOMIC_OPS(xor, ^=)
 static __inline__ void atomic64_##op(s64 i, atomic64_t *v)		\
 {									\
 	unsigned long flags;						\
+	volatile s64 *p = &v->counter;					\
 									\
-	_atomic_spin_lock_irqsave(v, flags);				\
-	v->counter c_op i;						\
-	_atomic_spin_unlock_irqrestore(v, flags);			\
+	_atomic_spin_lock_irqsave(p, flags);				\
+	*p c_op i;							\
+	_atomic_spin_unlock_irqrestore(p, flags);			\
 }									\

 #define ATOMIC64_OP_RETURN(op, c_op)					\
 static __inline__ s64 atomic64_##op##_return(s64 i, atomic64_t *v)	\
 {									\
 	unsigned long flags;						\
+	volatile s64 *p = &v->counter;					\
 	s64 ret;							\
 									\
-	_atomic_spin_lock_irqsave(v, flags);				\
-	ret = (v->counter c_op i);					\
-	_atomic_spin_unlock_irqrestore(v, flags);			\
+	_atomic_spin_lock_irqsave(p, flags);				\
+	ret = (*p c_op i);						\
+	_atomic_spin_unlock_irqrestore(p, flags);			\
 									\
 	return ret;							\
 }
@@ -169,12 +175,14 @@ static __inline__ s64 atomic64_##op##_return(s64 i, atomic64_t *v)	\
 static __inline__ s64 atomic64_fetch_##op(s64 i, atomic64_t *v)		\
 {									\
 	unsigned long flags;						\
-	s64 ret;							\
+	volatile s64 *p = &v->counter;					\
+	s64 ret, tmp;							\
 									\
-	_atomic_spin_lock_irqsave(v, flags);				\
-	ret = v->counter;						\
-	v->counter c_op i;						\
-	_atomic_spin_unlock_irqrestore(v, flags);			\
+	_atomic_spin_lock_irqsave(p, flags);				\
+	ret = *p;							\
+	tmp = ret;							\
+	*p = (tmp c_op i);						\
+	_atomic_spin_unlock_irqrestore(p, flags);			\
 									\
 	return ret;							\
 }
@@ -205,11 +213,11 @@ static __inline__ void
 atomic64_set(atomic64_t *v, s64 i)
 {
 	unsigned long flags;
-	_atomic_spin_lock_irqsave(v, flags);
-
-	v->counter = i;
+	volatile s64 *p = &v->counter;

-	_atomic_spin_unlock_irqrestore(v, flags);
+	_atomic_spin_lock_irqsave(p, flags);
+	*p = i;
+	_atomic_spin_unlock_irqrestore(p, flags);
 }

 static __inline__ s64
diff --git a/arch/parisc/include/asm/futex.h b/arch/parisc/include/asm/futex.h
index d2c3e4106851..a9e5366b5511 100644
--- a/arch/parisc/include/asm/futex.h
+++ b/arch/parisc/include/asm/futex.h
@@ -36,14 +36,15 @@ static inline int
 arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
 {
 	unsigned long int flags;
+	volatile u32 __user *u = uaddr;
 	int oldval, ret;
 	u32 tmp;

-	_futex_spin_lock_irqsave(uaddr, &flags);
+	_futex_spin_lock_irqsave(u, &flags);
 	pagefault_disable();

 	ret = -EFAULT;
-	if (unlikely(get_user(oldval, uaddr) != 0))
+	if (unlikely(get_user(oldval, u) != 0))
 		goto out_pagefault_enable;

 	ret = 0;
@@ -69,12 +70,12 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
 		ret = -ENOSYS;
 	}

-	if (ret == 0 && unlikely(put_user(tmp, uaddr) != 0))
+	if (ret == 0 && unlikely(put_user(tmp, u) != 0))
 		ret = -EFAULT;

 out_pagefault_enable:
 	pagefault_enable();
-	_futex_spin_unlock_irqrestore(uaddr, &flags);
+	_futex_spin_unlock_irqrestore(u, &flags);

 	if (!ret)
 		*oval = oldval;
@@ -88,14 +89,15 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
 {
 	u32 val;
 	unsigned long flags;
+	volatile u32 __user *u = uaddr;

 	/* futex.c wants to do a cmpxchg_inatomic on kernel NULL, which is
 	 * our gateway page, and causes no end of trouble...
 	 */
-	if (uaccess_kernel() && !uaddr)
+	if (uaccess_kernel() && !u)
 		return -EFAULT;

-	if (!access_ok(uaddr, sizeof(u32)))
+	if (!access_ok(u, sizeof(u32)))
 		return -EFAULT;

 	/* HPPA has no cmpxchg in hardware and therefore the
@@ -104,19 +106,19 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
 	 * address. This should scale to a couple of CPUs.
 	 */

-	_futex_spin_lock_irqsave(uaddr, &flags);
-	if (unlikely(get_user(val, uaddr) != 0)) {
-		_futex_spin_unlock_irqrestore(uaddr, &flags);
+	_futex_spin_lock_irqsave(u, &flags);
+	if (unlikely(get_user(val, u) != 0)) {
+		_futex_spin_unlock_irqrestore(u, &flags);
 		return -EFAULT;
 	}

-	if (val == oldval && unlikely(put_user(newval, uaddr) != 0)) {
-		_futex_spin_unlock_irqrestore(uaddr, &flags);
+	if (val == oldval && unlikely(put_user(newval, u) != 0)) {
+		_futex_spin_unlock_irqrestore(u, &flags);
 		return -EFAULT;
 	}

 	*uval = val;
-	_futex_spin_unlock_irqrestore(uaddr, &flags);
+	_futex_spin_unlock_irqrestore(u, &flags);

 	return 0;
 }
diff --git a/arch/parisc/lib/bitops.c b/arch/parisc/lib/bitops.c
index 70ffbcf889b8..5904966ca957 100644
--- a/arch/parisc/lib/bitops.c
+++ b/arch/parisc/lib/bitops.c
@@ -21,11 +21,12 @@ arch_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned = {
 unsigned long __xchg64(unsigned long x, unsigned long *ptr)
 {
 	unsigned long temp, flags;
+	volatile unsigned long *p = ptr;

-	_atomic_spin_lock_irqsave(ptr, flags);
-	temp = *ptr;
-	*ptr = x;
-	_atomic_spin_unlock_irqrestore(ptr, flags);
+	_atomic_spin_lock_irqsave(p, flags);
+	temp = *p;
+	*p = x;
+	_atomic_spin_unlock_irqrestore(p, flags);
 	return temp;
 }
 #endif
@@ -33,12 +34,13 @@ unsigned long __xchg64(unsigned long x, unsigned long *ptr)
 unsigned long __xchg32(int x, int *ptr)
 {
 	unsigned long flags;
+	volatile int *p = ptr;
 	long temp;

-	_atomic_spin_lock_irqsave(ptr, flags);
-	temp = (long) *ptr;	/* XXX - sign extension wanted? */
-	*ptr = x;
-	_atomic_spin_unlock_irqrestore(ptr, flags);
+	_atomic_spin_lock_irqsave(p, flags);
+	temp = (long) *p;	/* XXX - sign extension wanted? */
+	*p = x;
+	_atomic_spin_unlock_irqrestore(p, flags);
 	return (unsigned long)temp;
 }

@@ -46,12 +48,13 @@ unsigned long __xchg32(int x, int *ptr)
 unsigned long __xchg8(char x, char *ptr)
 {
 	unsigned long flags;
+	volatile char *p = ptr;
 	long temp;

-	_atomic_spin_lock_irqsave(ptr, flags);
-	temp = (long) *ptr;	/* XXX - sign extension wanted? */
-	*ptr = x;
-	_atomic_spin_unlock_irqrestore(ptr, flags);
+	_atomic_spin_lock_irqsave(p, flags);
+	temp = (long) *p;	/* XXX - sign extension wanted? */
+	*p = x;
+	_atomic_spin_unlock_irqrestore(p, flags);
 	return (unsigned long)temp;
 }

