From patchwork Wed Sep 4 18:34:04 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Ivanov X-Patchwork-Id: 2853825 Return-Path: X-Original-To: patchwork-linux-parisc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 61593C0AB5 for ; Wed, 4 Sep 2013 18:34:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2B01420519 for ; Wed, 4 Sep 2013 18:34:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8B80F20511 for ; Wed, 4 Sep 2013 18:34:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755605Ab3IDSeK (ORCPT ); Wed, 4 Sep 2013 14:34:10 -0400 Received: from forward4l.mail.yandex.net ([84.201.143.137]:41631 "EHLO forward4l.mail.yandex.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755081Ab3IDSeJ convert rfc822-to-8bit (ORCPT ); Wed, 4 Sep 2013 14:34:09 -0400 Received: from smtp6.mail.yandex.net (smtp6.mail.yandex.net [77.88.61.56]) by forward4l.mail.yandex.net (Yandex) with ESMTP id B3EEA1440C70; Wed, 4 Sep 2013 22:34:06 +0400 (MSK) Received: from smtp6.mail.yandex.net (localhost [127.0.0.1]) by smtp6.mail.yandex.net (Yandex) with ESMTP id 60DC41640E84; Wed, 4 Sep 2013 22:34:06 +0400 (MSK) Received: from relay.gero.in (relay.gero.in [77.37.212.15]) by smtp6.mail.yandex.net (nwsmtp/Yandex) with ESMTP id yiN7lo7muT-Y6Fi3kle; Wed, 4 Sep 2013 22:34:06 +0400 Mime-Version: 1.0 (Mac OS X Mail 6.5 \(1508\)) Subject: Re: parisc debian kernel - missing modules for C8000 - linux-image-3.10-2-parisc64-smp From: Alex Ivanov In-Reply-To: Date: Wed, 4 Sep 2013 22:34:04 +0400 Cc: Parisc List Message-Id: References: <521A7589.5000503@gmx.de> <108451378018002@web28j.yandex.ru> <3B9F0B38-597D-439E-B57E-0F7E9E11BE9D@p0n4ik.tk> To: John David Anglin X-Mailer: Apple Mail (2.1508) Sender: linux-parisc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-parisc@vger.kernel.org X-Spam-Status: No, score=-9.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP 02.09.2013, ? 18:10, John David Anglin ???????(?): > You don't think it ran briefly and crashed? > > I have a thought. The code that loads the microcode appears to be trying to load in 32-bit hunks. Maybe > we have a 64-bit path on the bus and we need to load the firmware in 64-bit words. > > Dave > -- > John David Anglin dave.anglin@bell.net Dave, Am i understood you right? I'm not sure if this correct, but it didn't help.-- To unsubscribe from this list: send the line "unsubscribe linux-parisc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html --- r100.c.orig 2013-09-04 16:53:28.000000000 +0000 +++ r100.c 2013-09-04 18:28:23.000000000 +0000 @@ -1049,9 +1049,13 @@ static int r100_cp_init_microcode(struct return err; } +#define RADEON_CP_ME_RAM_DATAHL 0x07dc0x07e0 + +void r100_mm_wregq(struct radeon_device *rdev, uint64_t reg, uint64_t v, + bool always_indirect); static void r100_cp_load_microcode(struct radeon_device *rdev) { - const __be32 *fw_data; + const __be64 *fw_data; int i, size; if (r100_gui_wait_for_idle(rdev)) { @@ -1060,14 +1064,12 @@ static void r100_cp_load_microcode(struc } if (rdev->me_fw) { - size = rdev->me_fw->size / 4; - fw_data = (const __be32 *)&rdev->me_fw->data[0]; + size = rdev->me_fw->size / 8; + fw_data = (const __be64 *)&rdev->me_fw->data[0]; WREG32(RADEON_CP_ME_RAM_ADDR, 0); - for (i = 0; i < size; i += 2) { - WREG32(RADEON_CP_ME_RAM_DATAH, - be32_to_cpup(&fw_data[i])); - WREG32(RADEON_CP_ME_RAM_DATAL, - be32_to_cpup(&fw_data[i + 1])); + for (i = 0; i < size; i += 1) { + r100_mm_wregq(rdev, RADEON_CP_ME_RAM_DATAHL, + be64_to_cpup(&fw_data[i]), false); } } } @@ -4078,6 +4080,21 @@ void r100_mm_wreg(struct radeon_device * } } +void r100_mm_wregq(struct radeon_device *rdev, uint64_t reg, uint64_t v, + bool always_indirect) +{ + if (reg < rdev->rmmio_size && !always_indirect) + writeq(v, ((void __iomem *)rdev->rmmio) + reg); + else { + unsigned long flags; + + spin_lock_irqsave(&rdev->mmio_idx_lock, flags); + writeq(reg, ((void __iomem *)rdev->rmmio) + RADEON_MM_INDEX); + writeq(v, ((void __iomem *)rdev->rmmio) + RADEON_MM_DATA); + spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags); + } +} + u32 r100_io_rreg(struct radeon_device *rdev, u32 reg) { if (reg < rdev->rio_mem_size)