| Message ID | 1662108958-15800-1-git-send-email-hongxing.zhu@nxp.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Add the iMX8MP PCIe support | expand |
Sorry, get the wrong v6 patches sending out. The correct one is re-issued. Please ignore this one. Best Regards Richard Zhu > -----Original Message----- > From: Richard Zhu <hongxing.zhu@nxp.com> > Sent: 2022年9月2日 16:56 > To: p.zabel@pengutronix.de; l.stach@pengutronix.de; bhelgaas@google.com; > lorenzo.pieralisi@arm.com; robh@kernel.org; shawnguo@kernel.org; > vkoul@kernel.org; alexander.stein@ew.tq-group.com; marex@denx.de; > richard.leitner@linux.dev > Cc: linux-phy@lists.infradead.org; devicetree@vger.kernel.org; > linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > linux-kernel@vger.kernel.org; kernel@pengutronix.de; dl-linux-imx > <linux-imx@nxp.com> > Subject: [PATCH v7 0/7] Add the iMX8MP PCIe support > > Based on the 6.0-rc1 of the pci/next branch. > This series adds the i.MX8MP PCIe support and tested on i.MX8MP EVK board > when one PCIe NVME device is used. > > - i.MX8MP PCIe has reversed initial PERST bit value refer to > i.MX8MQ/i.MX8MM. > Add the PHY PERST explicitly for i.MX8MP PCIe PHY. > - Add the i.MX8MP PCIe PHY support in the i.MX8M PCIe PHY driver. > And share as much as possible codes with i.MX8MM PCIe PHY. > - Add the i.MX8MP PCIe support in binding document, DTS files, and PCIe > driver. > > Main changes v6-->v7: > - Add "Reviewed-by: Lucas Stach <l.stach@pengutronix.de>" into first three > patches. > - Use "const *char" to replace the static allocation. > > Main changes v5-->v6: > - To avoid code duplication when find the gpr syscon regmap, add the > gpr compatible into the drvdata. > - Add one missing space before one curly brace in 3/7 of v5 series. > - 4/7 of v5 had been applied by Phillipp, thanks. For ease of tests, still > keep it in v6. > > Main changes v4-->v5: > - Use Lucas' approach, let blk-ctrl driver do the hsio-mix resets. > - Fetch the iomuxc-gpr regmap by the different phandles. > > Main changes v3-->v4: > - Regarding Phillipp's suggestions, add fix tag into the first commit. > - Add Reviewed and Tested tags. > > Main changes v2-->v3: > - Fix the schema checking error in the PHY dt-binding patch. > - Inspired by Lucas, the PLL configurations might not required when > external OSC is used as PCIe referrence clock. It's true. Remove all > the HSIO PLL bit manipulations, and PCIe works fine on i.MX8MP EVK board > with one NVME device is used. > - Drop the #4 patch of v2, since it had been applied by Rob. > > Main changes v1-->v2: > - It's my fault forget including Vinod, re-send v2 after include Vinod > and linux-phy@lists.infradead.org. > - List the basements of this patch-set. The branch, codes changes and so on. > - Clean up some useless register and bit definitions in #3 patch. > > Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml | 16 > ++++++++-- > arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 53 > ++++++++++++++++++++++++++++++ > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 43 > +++++++++++++++++++++++++ > drivers/pci/controller/dwc/pci-imx6.c | 27 > ++++++++++++++-- > drivers/phy/freescale/phy-fsl-imx8m-pcie.c | 144 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++----------- > ---------------- > drivers/reset/reset-imx7.c | 1 + > drivers/soc/imx/imx8mp-blk-ctrl.c | 10 > ++++++ > 7 files changed, 242 insertions(+), 52 deletions(-) > > [PATCH v6 1/7] dt-binding: phy: Add iMX8MP PCIe PHY binding [PATCH v6 2/7] > arm64: dts: imx8mp: Add iMX8MP PCIe support [PATCH v6 3/7] arm64: dts: > imx8mp-evk: Add PCIe support [PATCH v6 4/7] reset: imx7: Fix the iMX8MP > PCIe PHY PERST support [PATCH v6 5/7] soc: imx: imx8mp-blk-ctrl: handle PCIe > PHY resets [PATCH v6 6/7] phy: freescale: imx8m-pcie: Add i.MX8MP PCIe PHY > [PATCH v6 7/7] PCI: imx6: Add i.MX8MP PCIe support