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[v5,0/4] Add dbi2 and atu for i.MX8M PCIe EP

Message ID 1723534943-28499-1-git-send-email-hongxing.zhu@nxp.com (mailing list archive)
Headers show
Series Add dbi2 and atu for i.MX8M PCIe EP | expand

Message

Hongxing Zhu Aug. 13, 2024, 7:42 a.m. UTC
v5 changes:
- Correct subject prefix.

v4 changes:
- Add Frank's reviewed tag, and re-format the commit message.

v3 changes:
- Refine the commit descriptions.

v2 changes:
Thanks for Conor's comments.
- Place the new added properties at the end.

Ideally, dbi2 and atu base addresses should be fetched from DT.
Add dbi2 and atu base addresses for i.MX8M PCIe EP here.

[PATCH v5 1/4] dt-bindings: imx6q-pcie: Add reg-name "dbi2" and "atu"
[PATCH v5 2/4] arm64: dts: imx8mq: Add dbi2 and atu reg for i.MX8MQ
[PATCH v5 3/4] arm64: dts: imx8mp: Add dbi2 and atu reg for i.MX8MP
[PATCH v5 4/4] arm64: dts: imx8mm: Add dbi2 and atu reg for i.MX8MM

Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml | 13 +++++++++----
arch/arm64/boot/dts/freescale/imx8mm.dtsi                    |  8 +++++---
arch/arm64/boot/dts/freescale/imx8mp.dtsi                    |  7 +++++--
arch/arm64/boot/dts/freescale/imx8mq.dtsi                    |  8 +++++---
4 files changed, 24 insertions(+), 12 deletions(-)

Comments

Shawn Guo Aug. 31, 2024, 1:02 p.m. UTC | #1
On Tue, Aug 13, 2024 at 03:42:19PM +0800, Richard Zhu wrote:
> v5 changes:
> - Correct subject prefix.
> 
> v4 changes:
> - Add Frank's reviewed tag, and re-format the commit message.
> 
> v3 changes:
> - Refine the commit descriptions.
> 
> v2 changes:
> Thanks for Conor's comments.
> - Place the new added properties at the end.
> 
> Ideally, dbi2 and atu base addresses should be fetched from DT.
> Add dbi2 and atu base addresses for i.MX8M PCIe EP here.
> 
> [PATCH v5 1/4] dt-bindings: imx6q-pcie: Add reg-name "dbi2" and "atu"
> [PATCH v5 2/4] arm64: dts: imx8mq: Add dbi2 and atu reg for i.MX8MQ
> [PATCH v5 3/4] arm64: dts: imx8mp: Add dbi2 and atu reg for i.MX8MP
> [PATCH v5 4/4] arm64: dts: imx8mm: Add dbi2 and atu reg for i.MX8MM

Applied 3 DTS patches, thanks!
Shawn Guo Sept. 4, 2024, 9:38 a.m. UTC | #2
On Sat, Aug 31, 2024 at 09:02:38PM +0800, Shawn Guo wrote:
> On Tue, Aug 13, 2024 at 03:42:19PM +0800, Richard Zhu wrote:
> > v5 changes:
> > - Correct subject prefix.
> > 
> > v4 changes:
> > - Add Frank's reviewed tag, and re-format the commit message.
> > 
> > v3 changes:
> > - Refine the commit descriptions.
> > 
> > v2 changes:
> > Thanks for Conor's comments.
> > - Place the new added properties at the end.
> > 
> > Ideally, dbi2 and atu base addresses should be fetched from DT.
> > Add dbi2 and atu base addresses for i.MX8M PCIe EP here.
> > 
> > [PATCH v5 1/4] dt-bindings: imx6q-pcie: Add reg-name "dbi2" and "atu"
> > [PATCH v5 2/4] arm64: dts: imx8mq: Add dbi2 and atu reg for i.MX8MQ
> > [PATCH v5 3/4] arm64: dts: imx8mp: Add dbi2 and atu reg for i.MX8MP
> > [PATCH v5 4/4] arm64: dts: imx8mm: Add dbi2 and atu reg for i.MX8MM
> 
> Applied 3 DTS patches, thanks!

I have to take them out from my branch for now.  Ping me when bindings
change gets applied.

Shawn
Hongxing Zhu Sept. 25, 2024, 4:03 a.m. UTC | #3
> -----Original Message-----
> From: Shawn Guo <shawnguo2@yeah.net>
> Sent: 2024年9月4日 17:39
> To: Hongxing Zhu <hongxing.zhu@nxp.com>
> Cc: robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org;
> shawnguo@kernel.org; l.stach@pengutronix.de; devicetree@vger.kernel.org;
> linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org; kernel@pengutronix.de; imx@lists.linux.dev
> Subject: Re: [PATCH v5 0/4] Add dbi2 and atu for i.MX8M PCIe EP
> 
> On Sat, Aug 31, 2024 at 09:02:38PM +0800, Shawn Guo wrote:
> > On Tue, Aug 13, 2024 at 03:42:19PM +0800, Richard Zhu wrote:
> > > v5 changes:
> > > - Correct subject prefix.
> > >
> > > v4 changes:
> > > - Add Frank's reviewed tag, and re-format the commit message.
> > >
> > > v3 changes:
> > > - Refine the commit descriptions.
> > >
> > > v2 changes:
> > > Thanks for Conor's comments.
> > > - Place the new added properties at the end.
> > >
> > > Ideally, dbi2 and atu base addresses should be fetched from DT.
> > > Add dbi2 and atu base addresses for i.MX8M PCIe EP here.
> > >
> > > [PATCH v5 1/4] dt-bindings: imx6q-pcie: Add reg-name "dbi2" and "atu"
> > > [PATCH v5 2/4] arm64: dts: imx8mq: Add dbi2 and atu reg for i.MX8MQ
> > > [PATCH v5 3/4] arm64: dts: imx8mp: Add dbi2 and atu reg for i.MX8MP
> > > [PATCH v5 4/4] arm64: dts: imx8mm: Add dbi2 and atu reg for i.MX8MM
> >
> > Applied 3 DTS patches, thanks!
> 
> I have to take them out from my branch for now.  Ping me when bindings
> change gets applied.
> 
Hi Shawn:
The dts bindings change had been merged on Sep 06.
Can you help to merge the others?
I don't know why my ping email sent on Sep 09 is missing.
Re-send email again here.
Thanks in advanced.

Best Regards
Richard Zhu

> Shawn
Shawn Guo Oct. 8, 2024, 8:30 a.m. UTC | #4
On Wed, Sep 25, 2024 at 04:03:03AM +0000, Hongxing Zhu wrote:
> Hi Shawn:
> The dts bindings change had been merged on Sep 06.
> Can you help to merge the others?

Applied, thanks!