[v2,0/3] Workaround for IMX7d PCI-e PLL lock failure

Message

Trent Piepho Feb. 5, 2019, 12:17 a.m. UTC

This is the workaround for the IMX7d Erratum e10728, failure of
initialize PCIe PLL VCO oscillation resulting in PLL lock failure and
failure of the PCI-e link to come up.

The registers used in the workaround are based on the latest patch in
the NXP kernel.

This uses a new node of type fsl,imx7d-pcie-phy to get the PHY's
registers.  The node is found via a phandle, named fsl,imx7d-pcie-phy,
added to the PCI-e controller's node.

If the phandle is not present, or otherwise incorrect, there is a
warning message on IMX7d.

While the PHY's register could be added as another bank in the PCI-e
controller's register space, this isn't an accurate description of the
hardware.  The PHY is a different device and attached to a different
AIPS bus.

Changes since v1:
  Renamed imx-pcie-phy to imx7d-pci-phy since it appears this phy is
  specific to the imx7d.
  Split out dts binding change into its own patch.
  Changed error message to warning and improved it.

Trent Piepho (3):
  dt-bindings: imx6q-pcie: Add description of imx7d pcie phy
  ARM: dts: imx7d: Add node for PCIe PHY
  PCI: imx: Add workaround for e10728, IMX7d PCIe PLL failure

 .../devicetree/bindings/pci/fsl,imx6q-pcie.txt     | 11 +++++
 arch/arm/boot/dts/imx7d.dtsi                       |  9 ++++
 drivers/pci/controller/dwc/pci-imx6.c              | 57 ++++++++++++++++++++++
 3 files changed, 77 insertions(+)