Message ID | 20201023075744.26200-1-m.szyprowski@samsung.com (mailing list archive) |
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Fri, 23 Oct 2020 07:57:53 +0000 (GMT) From: Marek Szyprowski <m.szyprowski@samsung.com> To: linux-samsung-soc@vger.kernel.org, linux-pci@vger.kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jaehoon Chung <jh80.chung@samsung.com>, Marek Szyprowski <m.szyprowski@samsung.com>, Jingoo Han <jingoohan1@gmail.com>, Krzysztof Kozlowski <krzk@kernel.org>, Bjorn Helgaas <bhelgaas@google.com>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Vinod Koul <vkoul@kernel.org>, Kishon Vijay Abraham I <kishon@ti.com>, Rob Herring <robh+dt@kernel.org> Subject: [PATCH v2 0/6] Add DW PCIe support for Exynos5433 SoCs Date: Fri, 23 Oct 2020 09:57:38 +0200 Message-Id: <20201023075744.26200-1-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.17.1 X-Brightmail-Tracker: H4sIAAAAAAAAA0VSWUwTURTN67QzA7EwFJQXJBCbWJdEkKBm3FGJzgdR+BMjS5UJENnsUATi B4HIMoKsKhCChICU0gIpDUqFArWxNNhFSZAQiOEDlyr+FJQigrSD+Hfuuefcc+/LwxFRvSAI T8/KpWVZ0gwx6s0ffOOyHuFV1SUd/dYQSnYUp5HPjFYBObNWKiAVy00YaV+sREmbrR8jp3Qt KGlpNaFko03PI7///oKRauM8Rj4YMWLk0NwEEiWkVK0qQA01z2NUm0ZOaZQVKPVIqwSUaeYF j3JqQmKxG95nUuiM9DxaFn4u2TvtieIzyBn2yzfUJxYBjQ8LvHBIHIOjHXbMjUWEAsBS9hIL vLfwMoAtb/UCrnACaGNX+SzAPQ5dRTzHdwHYVLaJ7DhqVdM89yiUiIDsEou6DQFEFFxdId0a hGhHYFG1Ebg1/sR5uNb7zKPnE/thicbs4YXEWaj+M83n1guFPf1jngBIVGOwQbeOco1oWPuh C+GwP3SYtBiHg+HmkHuo21AC4IJVjXFFJYBTxY2AU52Gc9Y1z3oIcQj26cI5+gLceF61faYP nFnyc9PIFqwbfIpwtBCWl4o4tQQ2m3p3Ysft77fXoeC0o5vPPWkCnOj8xasBIc3/s9oAUIJA Ws5kptJMZBZ9L4yRZjLyrNSw29mZGrD1VSY3TCsvgX79lgEQOBDvEibX1CaJBNI8piDTACCO iAOEFy2TiSJhirSgkJZlJ8nkGTRjAHtxvjhQGNn+NUFEpEpz6Ts0nUPL/nV5uFdQEdj9wyUZ TXB+AmUbK/vEm3Eqxv76+oa8cCy+93j5eAzE1J2+wyMLB5ytk9oBX3uf1aKHBx3RwaLw/GHL 5EP1K4n5iiEo38UueiVqu3++OzkbfbXHPOWYO3FKeDMuPrbxfozy8vJYaAxPsafkY2ulS2me bprVDkge371G+W2SYj6TJo04jMgY6V+EAoUvJgMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrJLMWRmVeSWpSXmKPExsVy+t/xu7pMvZPiDeaGWixpyrCYf+Qcq8WN X22sFiu+zGS3uPC0h83i/PkN7BaXd81hszg77zibxYzz+5gs3vx+wW6x9shddovWvUfYLXbe OcHswOuxZt4aRo+ds+6yeyzYVOqxaVUnm0ffllWMHsdvbGfy+LxJLoA9Ss+mKL+0JFUhI7+4 xFYp2tDCSM/Q0kLPyMRSz9DYPNbKyFRJ384mJTUnsyy1SN8uQS9j2ornjAV7BCsOTY5rYNzE 18XIwSEhYCKxqzOyi5GLQ0hgKaPEl3sT2boYOYHiMhInpzWwQtjCEn+udbFBFH1ilNj0aAU7 SIJNwFCi620XWIOIgJPE+8kXmUGKmAXWMEs0tnUzgSSEBewlfq2bD2azCKhKNG86yQhi8wrY Sqz9e40FYoO8xOoNB5gnMPIsYGRYxSiSWlqcm55bbKRXnJhbXJqXrpecn7uJERjM24793LKD setd8CFGAQ5GJR7ehAkT44VYE8uKK3MPMUpwMCuJ8DqdPR0nxJuSWFmVWpQfX1Sak1p8iNEU aPlEZinR5HxgpOWVxBuaGppbWBqaG5sbm1koifN2CByMERJITyxJzU5NLUgtgulj4uCUamBk WXm58YiDsFHZtC62Z0LKfy92+YZKLFMNXdlb+n+LcvK/B685m14m7TH5Npl3z4acvcnPd3z5 qBPtk6RyQeqJ+KyNpqUyIt9d854UyvHNjfKTsG493Ge2SLSsj5VpjTlvSs/yG6ySuvO/PdjY x7m+wifArbYy9/9l5rUXPvfE3Io/pRW20U+JpTgj0VCLuag4EQCJ/uJPfAIAAA== X-CMS-MailID: 20201023075754eucas1p2ee617893ba13493236814235c619bc56 X-Msg-Generator: CA Content-Type: text/plain; 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Add DW PCIe support for Exynos5433 SoCs
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