Message ID | 20210218021757.21931-1-srikanth.thokala@intel.com (mailing list archive) |
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Headers | show
Return-Path: <linux-pci-owner@kernel.org> X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.8 required=3.0 tests=BAYES_00, DATE_IN_FUTURE_06_12,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D510DC433E0 for <linux-pci@archiver.kernel.org>; Wed, 17 Feb 2021 18:25:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8BC7F64E4B for <linux-pci@archiver.kernel.org>; Wed, 17 Feb 2021 18:25:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234876AbhBQSZX (ORCPT <rfc822;linux-pci@archiver.kernel.org>); Wed, 17 Feb 2021 13:25:23 -0500 Received: from mga14.intel.com ([192.55.52.115]:19580 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234875AbhBQSZV (ORCPT <rfc822;linux-pci@vger.kernel.org>); Wed, 17 Feb 2021 13:25:21 -0500 IronPort-SDR: yOoO6Wa9+ICv9G/F3wdwJ7NlMBPOO6rB+JeQHCBPXLf5GFXJh2fALoNv2Y7zs19hAJn6qRMzpy n3k+k61FLP3A== X-IronPort-AV: E=McAfee;i="6000,8403,9898"; a="182493739" X-IronPort-AV: E=Sophos;i="5.81,185,1610438400"; d="scan'208";a="182493739" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Feb 2021 10:24:38 -0800 IronPort-SDR: XjFJmUFQxXJ44re9vFO1djgmNtvjO5IqEoSS8xmWowWDHe3mIHgIoY4+hEwmnOhEBy6K1LM7pZ qj4SACB8NssA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.81,185,1610438400"; d="scan'208";a="385290936" Received: from intel-z390-ud.iind.intel.com ([10.223.252.51]) by fmsmga008.fm.intel.com with ESMTP; 17 Feb 2021 10:24:34 -0800 From: srikanth.thokala@intel.com To: bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, andriy.shevchenko@linux.intel.com, mgross@linux.intel.com, lakshmi.bai.raja.subramanian@intel.com, mallikarjunappa.sangannavar@intel.com, kw@linux.com, srikanth.thokala@intel.com Subject: [PATCH v8 0/2] PCI: keembay: Add support for Intel Keem Bay Date: Thu, 18 Feb 2021 07:47:55 +0530 Message-Id: <20210218021757.21931-1-srikanth.thokala@intel.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: <linux-pci.vger.kernel.org> X-Mailing-List: linux-pci@vger.kernel.org |
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PCI: keembay: Add support for Intel Keem Bay
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From: Srikanth Thokala <srikanth.thokala@intel.com> Hi, The first patch is to document DT bindings for Keem Bay PCIe controller for both Root Complex and Endpoint modes. The second patch is the driver file, a glue driver. Keem Bay PCIe controller is based on DesignWare PCIe IP. The patch was tested with Keem Bay evaluation module board, with A0 stepping. Kindly review. Thanks! Srikanth Changes since v7: - Rename keembay_pcie_ltssm_enable() to align to its functionality. - Fix other minor comments from "Krzysztof WilczyĆski <kw@linux.com>" Changes since v6: - Arrange SoB in chronological order. - Alphabetized and modified status of entry in MAINTAINERS. - Added a comment to specify the PCIe spec section about the delay. Changes since v5: - Rebased to v5.11-rc4. - Updated maintainers to add myself in DT binding documents. - Fix checkpatch issues. Changes since v4: - Rebased to v5.11-rc1 and retest. Changes since v3: - Add Reviewed-by: Rob Herring <robh@kernel.org> tag in dt-bindings patch. - Remove the keembay_pcie_{readl,writel} wrappers. And replace them with readl() and writel(). - Remove the dead code related to unused irqs. - Remove unused definition for unused irqs. - In keembay_pcie_ep_init(), initialize enabled interrupts to known state. - Rebased to next-20201215. Changes since v2: - In keembay_pcie_probe(), use return keembay_pcie_add_pcie_port(pcie, pdev); statement and remove return 0; at the end of the function. Changes since v1: - In dt-bindings patch. - Fixed indent warning for compatible property. - Rename interrupt-names to pcie, pcie_ev, pcie_err and pcie_mem_access, similar to the name used in datasheet. - Remove device_type, #address-cells and #size-cells property. - Remove num-viewport, num-ib-windows and num-ob-windows property. - Replace additionalProperties with unevaluatedProperties, for RC only. - Add dbi2 and atu property. - Remove description for regs and interrupts property. - Change enum value for num-lanes to 1 and 2 only. - In driver patch. - In Kconfig file, remove dependency on ARM64. - Add new define, PCIE_REGS_PCIE_SII_LINK_UP. - Remove PCIE_DBI2_MASK. - In struct keembay_pcie, declare pci member as struct, not pointer. And remove irq number members. - Rename and rework keembay_pcie_establish_link(), to keembay_pcie_start_link(). - Remove unneeded BAR disable steps. - Remove unused interrupt handlers; keembay_pcie_ev_irq_handler(), keembay_pcie_err_irq_handler(). - Remove keembay_pcie_enable_interrupts(). - Rework keembay_pcie_setup_irq() and call it from keembay_pcie_probe(). - Remove keembay_pcie_host_init() and make keembay_pcie_host_ops empty. - Keep and rework keembay_pcie_add_pcie_port() a little. - Remove keembay_pcie_add_pcie_ep() and call dw_pcie_ep_init() from keembay_pcie_probe(). - In keembay_pcie_probe(), remove dbi setup as it will be handled in dwc common code. - In keembay_pcie_link_up(), use return (val & PCIE_REGS_PCIE_SII_LINK_UP) == PCIE_REGS_PCIE_SII_LINK_UP. - In keembay_pcie_ep_raise_irq(), rework error message for PCI_EPC_IRQ_LEGACY and default cases. - Rebased to next-20201124, that has dwc pci refactoring, https://lore.kernel.org/linux-pci/20201105211159.1814485-1-robh@kernel.org/. Srikanth Thokala (2): dt-bindings: PCI: Add Intel Keem Bay PCIe controller PCI: keembay: Add support for Intel Keem Bay .../bindings/pci/intel,keembay-pcie-ep.yaml | 69 +++ .../bindings/pci/intel,keembay-pcie.yaml | 97 ++++ MAINTAINERS | 7 + drivers/pci/controller/dwc/Kconfig | 28 ++ drivers/pci/controller/dwc/Makefile | 1 + drivers/pci/controller/dwc/pcie-keembay.c | 452 ++++++++++++++++++ 6 files changed, 654 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/intel,keembay-pcie-ep.yaml create mode 100644 Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml create mode 100644 drivers/pci/controller/dwc/pcie-keembay.c base-commit: 45dfb8a5659ad286c28fa59008271dbc4e5e3f2d