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Sun, 6 Feb 2022 20:12:56 -0800 Envelope-to: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, lorenzo.pieralisi@arm.com, bhelgaas@google.com Received: from [10.140.9.2] (port=45184 helo=xhdbharatku40.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1nGvOa-0005Nx-8o; Sun, 06 Feb 2022 20:12:56 -0800 From: Bharat Kumar Gogada To: , CC: , , , Bharat Kumar Gogada Subject: [PATCH 0/2] Add support for Xilinx Versal CPM5 Root Port Date: Mon, 7 Feb 2022 09:42:47 +0530 Message-ID: <20220207041250.1658-1-bharat.kumar.gogada@xilinx.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 8c7c8e85-57fd-4f99-5e7c-08d9e9f0204f X-MS-TrafficTypeDiagnostic: DM8PR02MB8038:EE_ X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:3631; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Feb 2022 04:12:59.2193 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8c7c8e85-57fd-4f99-5e7c-08d9e9f0204f X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch01.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: DM3NAM02FT009.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM8PR02MB8038 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Xilinx Versal Premium series has CPM5 block which supports Root port functioning at Gen5 speed. Xilinx Versal CPM5 has few changes with existing CPM block. - CPM5 has dedicated register space for control and status registers. - CPM5 legacy interrupt handling needs additonal register bit to enable and handle legacy interrupts. Bharat Kumar Gogada (2): PCI: xilinx-cpm: Update YAML schemas for Versal CPM5 Root Port PCI: xilinx-cpm: Add support for Versal CPM5 Root Port driver .../bindings/pci/xilinx-versal-cpm.yaml | 47 ++++++++++++++++--- drivers/pci/controller/pcie-xilinx-cpm.c | 33 ++++++++++++- 2 files changed, 72 insertions(+), 8 deletions(-)