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[0/2] CXL: Taint user access to DOE mailbox config space

Message ID 20220822005237.540039-1-ira.weiny@intel.com (mailing list archive)
Headers show
Series CXL: Taint user access to DOE mailbox config space | expand

Message

Ira Weiny Aug. 22, 2022, 12:52 a.m. UTC 
From: Ira Weiny <ira.weiny@intel.com>

PCI config space access from user space has traditionally been unrestricted
with writes being an understood risk for device operation.

Unfortunately, device breakage or odd behavior from config writes lacks
indicators that can leave driver writers confused when evaluating failures.
This is especially true with the new PCIe Data Object Exchange (DOE) mailbox
protocol where backdoor shenanigans from user space through things such as
vendor defined protocols may affect device operation without complete breakage.

Even though access should not be restricted it would be nice for driver writers
to be able to flag critical parts of the config space such that interference
from user space can be detected.

Introduce pci_request_config_region_exclusive() and use it in the CXL driver
for DOE config space.

Ira Weiny (2):
  PCI: Allow drivers to request exclusive config regions
  cxl/doe: Request exclusive DOE access

 drivers/cxl/pci.c             |  5 +++++
 drivers/pci/pci-sysfs.c       |  6 ++++++
 drivers/pci/probe.c           |  6 ++++++
 include/linux/ioport.h        |  2 ++
 include/linux/pci.h           | 16 ++++++++++++++++
 include/uapi/linux/pci_regs.h |  1 +
 kernel/resource.c             | 13 ++++++++-----
 7 files changed, 44 insertions(+), 5 deletions(-)


base-commit: 1cd8a2537eb07751d405ab7e2223f20338a90506