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Tue, 13 Sep 2022 13:18:29 +0000 Received: from drhqmail203.nvidia.com (10.126.190.182) by drhqmail201.nvidia.com (10.126.190.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Tue, 13 Sep 2022 06:18:28 -0700 Received: from vidyas-desktop.nvidia.com (10.127.8.9) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server id 15.2.986.29 via Frontend Transport; Tue, 13 Sep 2022 06:18:24 -0700 From: Vidya Sagar To: , , , , , , , , CC: , , , , , , , Subject: [PATCH V4 0/2] PCI/ASPM: Save/restore L1SS Capability for suspend/resume Date: Tue, 13 Sep 2022 18:48:20 +0530 Message-ID: <20220913131822.16557-1-vidyas@nvidia.com> X-Mailer: git-send-email 2.17.1 X-NVConfidentiality: public MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT006:EE_|IA1PR12MB7565:EE_ X-MS-Office365-Filtering-Correlation-Id: 8c09f1f6-0947-4549-1527-08da958a73b7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Sep 2022 13:18:30.4344 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8c09f1f6-0947-4549-1527-08da958a73b7 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.236];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT006.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB7565 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This patch series saves and restores the ASPM L1SS capability registers during suspend/resume cycle of the system. First patch refactors the existing L1SS register programming code to take out the common code. Second patch adds support to save and restore of the L1SS registers using the common code extracted in the first patch to restore the registers. This patch is verified on Tegra194 and Tegra234 platforms. Vidya Sagar (2): PCI/ASPM: Refactor ASPM L1SS control register programming PCI/ASPM: Save/restore L1SS Capability for suspend/resume drivers/pci/pci.c | 7 +++ drivers/pci/pci.h | 4 ++ drivers/pci/pcie/aspm.c | 106 +++++++++++++++++++++++++++------------- 3 files changed, 83 insertions(+), 34 deletions(-)