mbox series

[v2,0/3] PCI: brcmstb: CLKREQ# accomodations of downstream device

Message ID 20230411165919.23955-1-jim2101024@gmail.com (mailing list archive)
Headers show
Series PCI: brcmstb: CLKREQ# accomodations of downstream device | expand

Message

Jim Quinlan April 11, 2023, 4:59 p.m. UTC
v2 -- Changed binding property 'brcm,completion-timeout-msec' to
      'brcm,completion-timeout-us'.  (StefanW for standard suffix).
   -- Warn when clamping timeout value, and include clamped
      region in message. Also add min and max in YAML. (StefanW)
   -- Qualify description of "brcm,completion-timeout-us" so that
      it refers to PCIe transactions. (StefanW)
   -- Remvove mention of Linux specifics in binding description. (StefanW)
   -- s/clkreq#/CLKREQ#/g (Bjorn)
   -- Refactor completion-timeout-us code to compare max and min to
      value given by the property (as opposed to the computed value).

v1 -- The current driver assumes the downstream devices can
      provide CLKREQ# for ASPM.  These commits accomodate devices
      w/ or w/o clkreq# and also handle L1SS-capable devices.

   -- The Raspian Linux folks have already been using a PCIe RC
      property "brcm,enable-l1ss".  These commits use the same
      property, in a backward-compatible manner, and the implementaion
      adds more detail and also automatically identifies devices w/o
      a clkreq# signal, i.e. most devices plugged into an RPi CM4
      IO board.

Jim Quinlan (3):
  PCI: brcmstb: CLKREQ# accomodations of downstream device
  PCI: brcmstb: Set PCIe transaction completion timeout
  blah blah

 drivers/pci/controller/pcie-brcmstb.c | 99 ++++++++++++++++++++++++---
 init/do_mounts.c                      | 16 ++++-
 2 files changed, 102 insertions(+), 13 deletions(-)


base-commit: 76f598ba7d8e2bfb4855b5298caedd5af0c374a8
prerequisite-patch-id: f38de8681d8746126d60b3430eaf218d2dd169cd
prerequisite-patch-id: 23e13189f200358976abf5bf3600973a20cf386c
prerequisite-patch-id: edfbe6ea39ed6a4937e2cec3bb8ee0e60091546d
prerequisite-patch-id: c87dd155e8506a2a277726c47d85bf3fa83727d5
prerequisite-patch-id: 579841e1dc179517506a7a7c42e0e651b3bc3649
prerequisite-patch-id: b5b079998ea451821edffd7c52cd3d89d06046a1
prerequisite-patch-id: b51b3918e554e279b2ace1f68ed6b4176f8ccc24
prerequisite-patch-id: 333e5188fb27d0ed010f5359e83e539172a67690
prerequisite-patch-id: bb107ee7b4811a9719508ea667cad2466933dec0
prerequisite-patch-id: 1258db336e778eb57d5cbea88834cd25aa1346ba

Comments

Florian Fainelli April 13, 2023, 6:40 p.m. UTC | #1
On 4/11/23 09:59, Jim Quinlan wrote:
> v2 -- Changed binding property 'brcm,completion-timeout-msec' to
>        'brcm,completion-timeout-us'.  (StefanW for standard suffix).
>     -- Warn when clamping timeout value, and include clamped
>        region in message. Also add min and max in YAML. (StefanW)
>     -- Qualify description of "brcm,completion-timeout-us" so that
>        it refers to PCIe transactions. (StefanW)
>     -- Remvove mention of Linux specifics in binding description. (StefanW)
>     -- s/clkreq#/CLKREQ#/g (Bjorn)
>     -- Refactor completion-timeout-us code to compare max and min to
>        value given by the property (as opposed to the computed value).
> 
> v1 -- The current driver assumes the downstream devices can
>        provide CLKREQ# for ASPM.  These commits accomodate devices
>        w/ or w/o clkreq# and also handle L1SS-capable devices.
> 
>     -- The Raspian Linux folks have already been using a PCIe RC
>        property "brcm,enable-l1ss".  These commits use the same
>        property, in a backward-compatible manner, and the implementaion
>        adds more detail and also automatically identifies devices w/o
>        a clkreq# signal, i.e. most devices plugged into an RPi CM4
>        IO board.
> 
> Jim Quinlan (3):
>    PCI: brcmstb: CLKREQ# accomodations of downstream device
>    PCI: brcmstb: Set PCIe transaction completion timeout
>    blah blah

Tested-by: Florian Fainelli <f.fainelli@gmail.com>

On a 7216 system test with:

01:00.0 Network controller: Intel Corporation Wireless 7260 (rev 73)

and on the CM4 I/O board with:

01:00.0 Network controller: Intel Corporation Wireless 7260 (rev 73)

01:00.0 Ethernet controller: Intel Corporation 82574L Gigabit Network 
Connection

01:00.0 Network controller: Broadcom Inc. and subsidiaries BCM43224 
802.11a/b/g/n (rev 01)

01:00.0 SATA controller: Marvell Technology Group Ltd. 88SE9125 PCIe 
SATA 6.0 Gb/s controller (rev 11) (prog-if 01 [AHCI 1.0])

01:00.0 Ethernet controller: Broadcom Inc. and subsidiaries NetXtreme 
BCM5751 Gigabit Ethernet PCI Express (rev 21)

01:00.0 PCI bridge: PLX Technology, Inc. PEX8112 x1 Lane PCI 
Express-to-PCI Bridge (rev aa)
02:00.0 Multiport serial controller: Pepperl+Fuchs RocketPort EXPRESS 
8-port w/Octa Cable

01:00.0 Ethernet controller: Qualcomm Atheros AR5008 Wireless Network 
Adapter (rev 01)

01:00.0 Network controller: Broadcom Inc. and subsidiaries BCM4311 
802.11a/b/g (rev 01)

01:00.0 Network controller: Broadcom Inc. and subsidiaries BCM4322 
802.11a/b/g/n Wireless LAN Controller (rev 01)

01:00.0 Network controller: Broadcom Inc. and subsidiaries BCM43602 
802.11ac Wireless LAN SoC (rev 01)

and finally with a 4 port switch:

-[0000:00]---00.0-[01-07]----00.0-[02-07]--+-01.0-[03]----00.0  Intel 
Corporation 82574L Gigabit Network Connection
 
+-03.0-[04-05]----00.0-[05]----00.0  Pepperl+Fuchs RocketPort EXPRESS 
8-port w/Octa Cable
                                            +-05.0-[06]----00.0 
Broadcom Inc. and subsidiaries NetXtreme BCM5751 Gigabit Ethernet PCI 
Express
                                            \-07.0-[07]----00.0  Intel 
Corporation 82574L Gigabit Network Connection

And than I ran out of devices that I could plug, the others were x4, x8 
or x16.

Most (all?) would previously fail, so definitively an improvement!

Thanks!