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[v2,0/3] Add Gen4 equalization and margining settings

Message ID 20240320071527.13443-1-quic_schintav@quicinc.com (mailing list archive)
Headers show
Series Add Gen4 equalization and margining settings | expand

Message

Shashank Babu Chinta Venkata March 20, 2024, 7:14 a.m. UTC 
Add Gen4 specific equalization and rx margining settings. These
settings are inline with respective PHY settings for Gen4
operation. 

In addition, current QCOM EP and RC drivers do not share common
codebase which would result in code duplication. Hence, adding
common files for code reusability among RC and EP drivers.

v1 -> v2:
- Capitilized commit message to be inline with history 
- Dropped stubs from header file.
- Moved Designware specific register offsets and masks to
  pcie-designware.h header file.
- Applied settings based on bus data rate rather than link generation.
- Addressed review comments from Bjorn and Frank.

Shashank Babu Chinta Venkata (3):
  PCI: qcom: Refactor common code
  PCI: qcom: Add equalization settings for gen4
  PCI: qcom: Add rx margining settings for gen4

 drivers/pci/controller/dwc/Kconfig           |   5 +
 drivers/pci/controller/dwc/Makefile          |   1 +
 drivers/pci/controller/dwc/pcie-designware.h |  38 +++++
 drivers/pci/controller/dwc/pcie-qcom-cmn.c   | 152 +++++++++++++++++++
 drivers/pci/controller/dwc/pcie-qcom-cmn.h   |  28 ++++
 drivers/pci/controller/dwc/pcie-qcom-ep.c    |  44 ++----
 drivers/pci/controller/dwc/pcie-qcom.c       |  72 ++-------
 7 files changed, 246 insertions(+), 94 deletions(-)
 create mode 100644 drivers/pci/controller/dwc/pcie-qcom-cmn.c
 create mode 100644 drivers/pci/controller/dwc/pcie-qcom-cmn.h