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Obtain this information from the firmware description since there is no architected method. ACPI provides a bit via IORT tables, so add the devicetree equivalent. It was discussed a while ago [1], but at the time only a software model supported it. Respin it now that hardware is available [2]. To test this with the Arm RevC model, enable ATS in the endpoint and note that ATS is enabled. Address translation is transparent to the OS. -C pci.pcie_rc.ahci0.endpoint.ats_supported=1 $ lspci -s 00:1f.0 -vv Capabilities: [100 v1] Address Translation Service (ATS) ATSCap: Invalidate Queue Depth: 00 ATSCtl: Enable+, Smallest Translation Unit: 00 [1] https://lore.kernel.org/linux-iommu/20200213165049.508908-1-jean-philippe@linaro.org/ [2] https://lore.kernel.org/linux-arm-kernel/ZeJP6CwrZ2FSbTYm@Asurada-Nvidia/ Jean-Philippe Brucker (3): dt-bindings: PCI: generic: Add ats-supported property iommu/of: Support ats-supported device-tree property arm64: dts: fvp: Enable PCIe ATS for Base RevC FVP .../devicetree/bindings/pci/host-generic-pci.yaml | 6 ++++++ drivers/iommu/of_iommu.c | 9 +++++++++ arch/arm64/boot/dts/arm/fvp-base-revc.dts | 1 + 3 files changed, 16 insertions(+)