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Additional to the PCie core controller changes added some new PHY changes to help improve and clean up the code. Previous changes. v5: https://lore.kernel.org/all/20240901183221.240361-2-linux.amoon@gmail.com/ V4: https://lore.kernel.org/all/20240625104039.48311-1-linux.amoon@gmail.com/ V3: https://lore.kernel.org/all/20240622061845.3678-1-linux.amoon@gmail.com/ V2: https://lore.kernel.org/all/20240621064426.282048-1-linux.amoon@gmail.com/ V1: https://lore.kernel.org/all/20240618164133.223194-2-linux.amoon@gmail.com/ Anand Moon (3): PCI: rockchip: Simplify clock handling by using clk_bulk*() function PCI: rockchip: Simplify reset control handling by using reset_control_bulk*() function PCI: rockchip: Refactor rockchip_pcie_disable_clocks() function signature drivers/pci/controller/pcie-rockchip.c | 219 +++++-------------------- drivers/pci/controller/pcie-rockchip.h | 35 ++-- 2 files changed, 61 insertions(+), 193 deletions(-) base-commit: 8f602276d3902642fdc3429b548d73c745446601