| Message ID | 20250214105007.97582-1-shradha.t@samsung.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Add support for debugfs based RAS DES feature in PCIe DW | expand |
On Fri, Feb 14, 2025 at 04:20:03PM +0530, Shradha Todi wrote: > DesignWare controller provides a vendor specific extended capability > called RASDES as an IP feature. This extended capability provides > hardware information like: > - Debug registers to know the state of the link or controller. > - Error injection mechanisms to inject various PCIe errors including > sequence number, CRC > - Statistical counters to know how many times a particular event > occurred > > However, in Linux we do not have any generic or custom support to be > able to use this feature in an efficient manner. This is the reason we > are proposing this framework. Debug and bring up time of high-speed IPs > are highly dependent on costlier hardware analyzers and this solution > will in some ways help to reduce the HW analyzer usage. > > The debugfs entries can be used to get information about underlying > hardware and can be shared with user space. Separate debugfs entries has > been created to cater to all the DES hooks provided by the controller. > The debugfs entries interacts with the RASDES registers in the required > sequence and provides the meaningful data to the user. This eases the > effort to understand and use the register information for debugging. > > This series creates a generic debugfs framework for DesignWare PCIe > controllers where other debug features apart from RASDES can also be > added as and when required. FWIW, for the series: Tested-by: Niklas Cassel <cassel@kernel.org>
DesignWare controller provides a vendor specific extended capability called RASDES as an IP feature. This extended capability provides hardware information like: - Debug registers to know the state of the link or controller. - Error injection mechanisms to inject various PCIe errors including sequence number, CRC - Statistical counters to know how many times a particular event occurred However, in Linux we do not have any generic or custom support to be able to use this feature in an efficient manner. This is the reason we are proposing this framework. Debug and bring up time of high-speed IPs are highly dependent on costlier hardware analyzers and this solution will in some ways help to reduce the HW analyzer usage. The debugfs entries can be used to get information about underlying hardware and can be shared with user space. Separate debugfs entries has been created to cater to all the DES hooks provided by the controller. The debugfs entries interacts with the RASDES registers in the required sequence and provides the meaningful data to the user. This eases the effort to understand and use the register information for debugging. This series creates a generic debugfs framework for DesignWare PCIe controllers where other debug features apart from RASDES can also be added as and when required. v6: - Addressed Niklas's comment to make vsec ID finding similar to perf - Minor changes in the driver to make the debugfs file common and not specefic to RASDES so that other developers can add debug related features to this file. v5: https://lore.kernel.org/all/20250121111421.35437-1-shradha.t@samsung.com/ - Addressed Fan's comment to split the patches for easier review - Addressed Bjorn's comment to fix vendor specific cap search - Addressed style related change requests from v4 - Added rasdes debugfs init call to common designware files for host and EP. v4: https://lore.kernel.org/lkml/20241206074456.17401-1-shradha.t@samsung.com/ - Addressed comments from Manivannan, Bjorn and Jonathan - Addressed style related change requests from v3 - Added Documentation under Documentation/ABI/testing and kdoc stype comments wherever required for better understanding - Enhanced error injection to include all possible error groups - Removed debugfs init call from common designware file and left it up to individual platform drivers to init/deinit as required. v3: https://lore.kernel.org/all/20240625093813.112555-1-shradha.t@samsung.com/ - v2 had suggestions about moving this framework to perf/EDAC instead of a controller specific debugfs but after discussions we decided to go ahead with the same. Rebased and posted v3 with minor style changes. v2: https://lore.kernel.org/lkml/20231130115044.53512-1-shradha.t@samsung.com/ - Addressed comments from Krzysztof Wilczyński, Bjorn Helgaas and posted v2 with a changed implementation for a better code design v1: https://lore.kernel.org/all/20210518174618.42089-1-shradha.t@samsung.com/T/ Shradha Todi (4): PCI: dwc: Add support for vendor specific capability search Add debugfs based silicon debug support in DWC Add debugfs based error injection support in DWC Add debugfs based statistical counter support in DWC Documentation/ABI/testing/debugfs-dwc-pcie | 144 +++++ drivers/pci/controller/dwc/Kconfig | 10 + drivers/pci/controller/dwc/Makefile | 1 + .../controller/dwc/pcie-designware-debugfs.c | 595 ++++++++++++++++++ .../pci/controller/dwc/pcie-designware-ep.c | 5 + .../pci/controller/dwc/pcie-designware-host.c | 6 + drivers/pci/controller/dwc/pcie-designware.c | 19 + drivers/pci/controller/dwc/pcie-designware.h | 21 + 8 files changed, 801 insertions(+) create mode 100644 Documentation/ABI/testing/debugfs-dwc-pcie create mode 100644 drivers/pci/controller/dwc/pcie-designware-debugfs.c