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[v3,0/2] PCI: mediatek-gen3: Set PBUS_CSR regs for Airoha EN7581 SoC.

Message ID 20250222-en7581-pcie-pbus-csr-v3-0-e0cca1f4d394@kernel.org (mailing list archive)
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Series PCI: mediatek-gen3: Set PBUS_CSR regs for Airoha EN7581 SoC. | expand

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Lorenzo Bianconi Feb. 22, 2025, 10:43 a.m. UTC 
Configure PBus base address and base address mask to allow the hw
to detect if a given address is accessible on the PCIe controller.
Introduce mediatek,pbus-csr phandle array property.

Changes in v3:
- Get base address and base address mask from range property
- Define mediatek,pbus-csr as phandle array
- Link to v2: https://lore.kernel.org/r/20250202-en7581-pcie-pbus-csr-v2-0-65dcb201c9a9@kernel.org

Changes in v2:
- Introduce mediatek,pbus-csr phandle property
- Drop patch 1/2 in v1
- Do not hard-code compatible sting in the driver and use phandle
  instead

---
Lorenzo Bianconi (2):
      dt-bindings: PCI: mediatek-gen3: Add mediatek,pbus-csr phandle array property
      PCI: mediatek-gen3: Configure PBUS_CSR registers for EN7581 SoC

 .../bindings/pci/mediatek-pcie-gen3.yaml           | 17 +++++++++++
 drivers/pci/controller/pcie-mediatek-gen3.c        | 34 +++++++++++++++++++++-
 2 files changed, 50 insertions(+), 1 deletion(-)
---
base-commit: b6d7bb0d3bd74b491e2e6fd59c4d5110d06fd63b
change-id: 20250201-en7581-pcie-pbus-csr-f9c4f88ce5b3

Best regards,