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[v10,0/3] PCI: Add Intel PCIe Driver and respective dt-binding yaml file

Message ID cover.1575612493.git.eswara.kota@linux.intel.com (mailing list archive)
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Series PCI: Add Intel PCIe Driver and respective dt-binding yaml file | expand

Message

Dilip Kota Dec. 6, 2019, 7:27 a.m. UTC 
Intel PCIe is Synopsys based controller. Intel PCIe driver uses
DesignWare PCIe framework for host initialization and register
configurations.

Changes on v10:
	Rebase the patches on mainline v5.4
	Squashed the patch that fixes the below issue to this patch series.

	  WARNING: unmet direct dependencies detected for PCIE_DW_HOST
	    Depends on [n]: PCI [=y] && PCI_MSI_IRQ_DOMAIN [=n]
	    Selected by [y]:
	    - PCIE_INTEL_GW [=y] && PCI [=y] && OF [=y] && (X86 [=y] || COMPILE_TEST [=n])
	  "reportedby Randy Dunlap <rdunlap@infradead.org>"

Dilip Kota (3):
  dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller
  PCI: dwc: intel: PCIe RC controller driver
  PCI: artpec6: Configure FTS with dwc helper function

 .../devicetree/bindings/pci/intel-gw-pcie.yaml     | 138 ++++++
 drivers/pci/controller/dwc/Kconfig                 |  11 +
 drivers/pci/controller/dwc/Makefile                |   1 +
 drivers/pci/controller/dwc/pcie-artpec6.c          |   8 +-
 drivers/pci/controller/dwc/pcie-designware.c       |  57 +++
 drivers/pci/controller/dwc/pcie-designware.h       |  12 +
 drivers/pci/controller/dwc/pcie-intel-gw.c         | 545 +++++++++++++++++++++
 include/uapi/linux/pci_regs.h                      |   1 +
 8 files changed, 766 insertions(+), 7 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
 create mode 100644 drivers/pci/controller/dwc/pcie-intel-gw.c

Comments

Lorenzo Pieralisi Dec. 6, 2019, 10:51 a.m. UTC | #1 
On Fri, Dec 06, 2019 at 03:27:47PM +0800, Dilip Kota wrote:
> Intel PCIe is Synopsys based controller. Intel PCIe driver uses
> DesignWare PCIe framework for host initialization and register
> configurations.
> 
> Changes on v10:
> 	Rebase the patches on mainline v5.4

I meant current mainline (given that the PCI PR for v5.5 is now
merged), not v5.4, patchset does not apply. Given that v5.5-rc1
is coming up, please rebase on top of v5.5-rc1 and repost it I
will try to merge it then.

Thanks,
Lorenzo

> 	Squashed the patch that fixes the below issue to this patch series.
> 
> 	  WARNING: unmet direct dependencies detected for PCIE_DW_HOST
> 	    Depends on [n]: PCI [=y] && PCI_MSI_IRQ_DOMAIN [=n]
> 	    Selected by [y]:
> 	    - PCIE_INTEL_GW [=y] && PCI [=y] && OF [=y] && (X86 [=y] || COMPILE_TEST [=n])
> 	  "reportedby Randy Dunlap <rdunlap@infradead.org>"
> 
> Dilip Kota (3):
>   dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller
>   PCI: dwc: intel: PCIe RC controller driver
>   PCI: artpec6: Configure FTS with dwc helper function
> 
>  .../devicetree/bindings/pci/intel-gw-pcie.yaml     | 138 ++++++
>  drivers/pci/controller/dwc/Kconfig                 |  11 +
>  drivers/pci/controller/dwc/Makefile                |   1 +
>  drivers/pci/controller/dwc/pcie-artpec6.c          |   8 +-
>  drivers/pci/controller/dwc/pcie-designware.c       |  57 +++
>  drivers/pci/controller/dwc/pcie-designware.h       |  12 +
>  drivers/pci/controller/dwc/pcie-intel-gw.c         | 545 +++++++++++++++++++++
>  include/uapi/linux/pci_regs.h                      |   1 +
>  8 files changed, 766 insertions(+), 7 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
>  create mode 100644 drivers/pci/controller/dwc/pcie-intel-gw.c
> 
> -- 
> 2.11.0
>