From patchwork Tue Jul 6 12:23:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mauro Carvalho Chehab X-Patchwork-Id: 12360481 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79765C07E96 for ; Tue, 6 Jul 2021 12:39:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 60A1162309 for ; Tue, 6 Jul 2021 12:39:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237290AbhGFMlp (ORCPT ); Tue, 6 Jul 2021 08:41:45 -0400 Received: from mail.kernel.org ([198.145.29.99]:45046 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242161AbhGFMZt (ORCPT ); Tue, 6 Jul 2021 08:25:49 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 6324C622E9; Tue, 6 Jul 2021 12:23:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1625574190; bh=wz4Bic0LSPWmrCj80ELZl2dM0eChPNGuIIo785wRWDw=; h=From:To:Cc:Subject:Date:From; b=RXfwtOXbimz822euPvZ9jCYUkxtuTtUsicRgUhnDJ/VlBQFDfty6hxF87aW0Tf7Gw GgGsvbXHPxBQEvWzc8021HYoSBJtcFtAb5OFuSaAoLGiXufB3IvOMxM+nB0XjcaOmp 9xXfYA4uRF+lH6MrDeL61na0vPyl0XK4/M7JtpLfFXatgY3SEQazITSz3eIIOs5sl8 qf/jyDqkE80a6QyL7LYofiV53/f5dtV187FLgxktsjIZoDR0KeCedMK0FTJI4AvP6F Ps08ZgTnkwu4i9cDTGQCS7wWg5O2t0IEY3XHI8wkafg3uVgoRYh+n8VC8SJltZ0GXM 4sACa0d+6YT6Q== Received: by mail.kernel.org with local (Exim 4.94.2) (envelope-from ) id 1m0k6W-004qMk-4w; Tue, 06 Jul 2021 14:23:08 +0200 From: Mauro Carvalho Chehab To: Rob Herring Cc: linuxarm@huawei.com, mauro.chehab@huawei.com, Mauro Carvalho Chehab , =?utf-8?q?Krzysztof_Wilc?= =?utf-8?q?zy=C5=84ski?= , Binghui Wang , Xiaowei Song , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org Subject: [PATCH RFC 0/1] Move PHY out of pcie-kirin driver Date: Tue, 6 Jul 2021 14:23:05 +0200 Message-Id: X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Sender: Mauro Carvalho Chehab Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org During the review of the Kirin 970 PCIe patch series, it was pointed that the pcie-kirin driver has PHY logic mixed inside it: https://lore.kernel.org/lkml/CAL_JsqK7_hAw4aacHyiqJWE6zSWiMez5695+deaCSHfeWuX-XA@mail.gmail.com/ Probably due to that, support for those devices weren't added upstream. Before trying to re-send it again, let's split the existing PHY code for Kirin 960 (Hisi3660) from the driver. Please notice that this change will alter the device tree, as a new PHY descriptor will be needed, and the PHY properties from the pcie nodes will need to switch. This patch doesn't change the documentation yet, but it does change the DTS file. If this change is OK, I'll resend this patch together with the documentation changes. Tested on a Hikey 960. After the patch, the PCI bridge is properly displayed: $ lspci 00:00.0 PCI bridge: Huawei Technologies Co., Ltd. Device 3660 (rev 01) Unfortunately, currently I can't test if the bridge is working as this bridge supports only non-SATA M.2 devices. I'm acquiring one for tests, but it will take a couple weeks to arrive. Mauro Carvalho Chehab (1): PCI: dwc: pcie-kirin: split PHY interface from the driver arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 24 +- drivers/pci/controller/dwc/pcie-kirin.c | 195 +++------------- drivers/phy/hisilicon/Kconfig | 10 + drivers/phy/hisilicon/Makefile | 1 + drivers/phy/hisilicon/phy-hi3660-pcie.c | 261 ++++++++++++++++++++++ 5 files changed, 321 insertions(+), 170 deletions(-) create mode 100644 drivers/phy/hisilicon/phy-hi3660-pcie.c