From patchwork Wed May 27 18:27:38 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Duc Dang X-Patchwork-Id: 6492341 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9FF089F399 for ; Wed, 27 May 2015 18:28:58 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B8DF2206A4 for ; Wed, 27 May 2015 18:28:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B670620644 for ; Wed, 27 May 2015 18:28:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753047AbbE0S22 (ORCPT ); Wed, 27 May 2015 14:28:28 -0400 Received: from exprod5og123.obsmtp.com ([64.18.0.198]:60191 "EHLO mail-pa0-f50.google.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751724AbbE0S20 (ORCPT ); Wed, 27 May 2015 14:28:26 -0400 Received: from mail-pa0-f50.google.com ([209.85.220.50]) (using TLSv1) by exprod5ob123.postini.com ([64.18.4.12]) with SMTP ID DSNKVWYMyvTVRz6uVXpKhBTWMetCKJvwKCHQ@postini.com; Wed, 27 May 2015 11:28:26 PDT Received: by padbw4 with SMTP id bw4so3795163pad.0 for ; Wed, 27 May 2015 11:28:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=oS5dc8x/Uj9s9FPuG8igrn8BQLwp9OhvcHGtbvkugUg=; b=A8oBW9wVzH0BvTMrA+iDoRR/ogC9FuYq+e2guDELAml5bRkFxLXQ8gXWsDMEguzLgn E6vyjYDB/wbsXM9JrvxlQ6t3Zd8o6O0U5H73r5NTBK5n/6IKuZqvb7nlR/RqKse1cFl1 1thLJRmjGldrZKKVbzTf6Wj26Kbt1/6FVFgl6yxbIpQ4UItCq2pGFWUiQIB1JkF0kwD9 oGeG3jlOaFMIqBf3EaXwYDA69Akw6PqLn0Z//mHszFBrfQQ4uuyR6uxYkQr9y1GPIaAK KTQQJe31wfIdapICsitYV/WMUghrwh7HUSh4GlDIOY0fTXnShyZWMaWa0U7PhIgZ+ik9 e/EQ== X-Gm-Message-State: ALoCoQkjnuGwVE4A3HJ3uzPVEnlUJcNbYsTFQEcCFMOqLJFO1lLYhAS6gl0wxguaxmXhP44XkhXziaYX6f8d+xgZ0lGdZk9raspaY75Wr6Z0HKqjqfULYEvNXGMYiU95mjLF2bRrWN801O2sariXdsHCIzgUoarZgA== X-Received: by 10.68.114.131 with SMTP id jg3mr61449588pbb.54.1432751304086; Wed, 27 May 2015 11:28:24 -0700 (PDT) X-Received: by 10.68.114.131 with SMTP id jg3mr61449563pbb.54.1432751303980; Wed, 27 May 2015 11:28:23 -0700 (PDT) Received: from dhdang-Precision-WorkStation-T3400.amcc.com (67-207-112-226.static.wiline.com. [67.207.112.226]) by mx.google.com with ESMTPSA id hj11sm16887848pbd.33.2015.05.27.11.28.21 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 27 May 2015 11:28:23 -0700 (PDT) From: Duc Dang To: Bjorn Helgaas , Arnd Bergmann , Grant Likely , Liviu Dudau , Marc Zyngier , Thomas Gleixner , Jason Cooper , Mark Rutland Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tanmay Inamdar , Loc Ho , Feng Kan , Duc Dang Subject: [PATCH v9 3/4] arm64: dts: Add the device tree entry for the APM X-Gene PCIe MSI node Date: Wed, 27 May 2015 11:27:38 -0700 Message-Id: <0fcf7325d2b5da11442473fb8439f8eff450217a.1432747280.git.dhdang@apm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: References: In-Reply-To: References: <20150525125206.64d15861@arm.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP There is single MSI block in X-Gene v1 SOC which serves all 5 PCIe ports. Signed-off-by: Duc Dang Signed-off-by: Tanmay Inamdar Reviewed-by: Marc Zyngier --- arch/arm64/boot/dts/apm/apm-storm.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi index c8d3e0e..d8f3a1c 100644 --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi @@ -374,6 +374,28 @@ }; }; + msi: msi@79000000 { + compatible = "apm,xgene1-msi"; + msi-controller; + reg = <0x00 0x79000000 0x0 0x900000>; + interrupts = < 0x0 0x10 0x4 + 0x0 0x11 0x4 + 0x0 0x12 0x4 + 0x0 0x13 0x4 + 0x0 0x14 0x4 + 0x0 0x15 0x4 + 0x0 0x16 0x4 + 0x0 0x17 0x4 + 0x0 0x18 0x4 + 0x0 0x19 0x4 + 0x0 0x1a 0x4 + 0x0 0x1b 0x4 + 0x0 0x1c 0x4 + 0x0 0x1d 0x4 + 0x0 0x1e 0x4 + 0x0 0x1f 0x4>; + }; + pcie0: pcie@1f2b0000 { status = "disabled"; device_type = "pci"; @@ -395,6 +417,7 @@ 0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x1>; dma-coherent; clocks = <&pcie0clk 0>; + msi-parent = <&msi>; }; pcie1: pcie@1f2c0000 { @@ -418,6 +441,7 @@ 0x0 0x0 0x0 0x4 &gic 0x0 0xcb 0x1>; dma-coherent; clocks = <&pcie1clk 0>; + msi-parent = <&msi>; }; pcie2: pcie@1f2d0000 { @@ -441,6 +465,7 @@ 0x0 0x0 0x0 0x4 &gic 0x0 0xd1 0x1>; dma-coherent; clocks = <&pcie2clk 0>; + msi-parent = <&msi>; }; pcie3: pcie@1f500000 { @@ -464,6 +489,7 @@ 0x0 0x0 0x0 0x4 &gic 0x0 0xd7 0x1>; dma-coherent; clocks = <&pcie3clk 0>; + msi-parent = <&msi>; }; pcie4: pcie@1f510000 { @@ -487,6 +513,7 @@ 0x0 0x0 0x0 0x4 &gic 0x0 0xdd 0x1>; dma-coherent; clocks = <&pcie4clk 0>; + msi-parent = <&msi>; }; serial0: serial@1c020000 {