From patchwork Tue Mar 31 01:40:33 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yu Zhao X-Patchwork-Id: 15312 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n2V1dd81003407 for ; Tue, 31 Mar 2009 01:39:39 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751869AbZCaBjk (ORCPT ); Mon, 30 Mar 2009 21:39:40 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1753641AbZCaBjk (ORCPT ); Mon, 30 Mar 2009 21:39:40 -0400 Received: from mga03.intel.com ([143.182.124.21]:41043 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751869AbZCaBjj (ORCPT ); Mon, 30 Mar 2009 21:39:39 -0400 Received: from azsmga001.ch.intel.com ([10.2.17.19]) by azsmga101.ch.intel.com with ESMTP; 30 Mar 2009 18:39:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.38,449,1233561600"; d="scan'208";a="125906707" Received: from yzhao-otc.sh.intel.com ([10.239.48.165]) by azsmga001.ch.intel.com with ESMTP; 30 Mar 2009 18:39:36 -0700 From: Yu Zhao To: jbarnes@virtuousgeek.org Cc: linux-pci@vger.kernel.org, Yu Zhao Subject: [PATCH] PCI: SR-IOV quirk for Intel 82576 NIC Date: Tue, 31 Mar 2009 09:40:33 +0800 Message-Id: <1238463633-11071-1-git-send-email-yu.zhao@intel.com> X-Mailer: git-send-email 1.6.1 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org If BIOS doesn't allocate resources for the SR-IOV BARs, zero the Flash BAR and program the SR-IOV BARs to use the old Flash Memory Space. Please refer to Intel 82576 Gigabit Ethernet Controller Datasheet section 7.9.2.14.2 for details. http://download.intel.com/design/network/datashts/82576_Datasheet.pdf Signed-off-by: Yu Zhao --- drivers/pci/quirks.c | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 50 insertions(+), 0 deletions(-) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 92b9efe..6e145d4 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -2268,6 +2268,56 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x4375, #endif /* CONFIG_PCI_MSI */ +#ifdef CONFIG_PCI_IOV + +/* + * For Intel 82576 SR-IOV NIC, if BIOS doesn't allocate resources for the + * SR-IOV BARs, zero Flash BAR and program the SR-IOV BARs to use the old + * Flash Memory Space. PCI subsystem may try to allocate Memory Space for + * Flash BAR later, that's why we don't clear Flash BAR flags. + */ +static void __devinit intel_82576_quirk(struct pci_dev *dev) +{ + int pos, flags; + u32 bar, start, size; + + if (PAGE_SIZE > 0x10000) + return; + + flags = pci_resource_flags(dev, 0); + if ((flags & PCI_BASE_ADDRESS_SPACE) != + PCI_BASE_ADDRESS_SPACE_MEMORY || + (flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK) != + PCI_BASE_ADDRESS_MEM_TYPE_32) + return; + + pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV); + if (!pos) + return; + + pci_read_config_dword(dev, pos + PCI_SRIOV_BAR, &bar); + if (bar & PCI_BASE_ADDRESS_MEM_MASK) + return; + + start = pci_resource_start(dev, 1); + size = pci_resource_len(dev, 1); + if (!start || size != 0x400000 || start & (size - 1)) + return; + + pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0); + pci_resource_start(dev, 1) = 0; + pci_resource_end(dev, 1) = size - 1; + pci_write_config_dword(dev, pos + PCI_SRIOV_BAR, start); + pci_write_config_dword(dev, pos + PCI_SRIOV_BAR + 12, start + size / 2); + + dev_info(&dev->dev, "use Flash Memory Space for SR-IOV BARs\n"); +} +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10c9, intel_82576_quirk); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e6, intel_82576_quirk); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e7, intel_82576_quirk); + +#endif /* CONFIG_PCI_IOV */ + static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f, struct pci_fixup *end) {