From patchwork Tue Apr 7 01:33:30 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yu Zhao X-Patchwork-Id: 16702 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n371WW30001094 for ; Tue, 7 Apr 2009 01:32:32 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752247AbZDGBcZ (ORCPT ); Mon, 6 Apr 2009 21:32:25 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1754283AbZDGBcZ (ORCPT ); Mon, 6 Apr 2009 21:32:25 -0400 Received: from mga09.intel.com ([134.134.136.24]:22685 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752247AbZDGBcX (ORCPT ); Mon, 6 Apr 2009 21:32:23 -0400 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP; 06 Apr 2009 18:23:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.39,333,1235980800"; d="scan'208";a="400902703" Received: from yzhao-otc.sh.intel.com ([10.239.48.165]) by orsmga002.jf.intel.com with ESMTP; 06 Apr 2009 18:40:32 -0700 From: Yu Zhao To: linux-pci@vger.kernel.org Cc: kvm@vger.kernel.org, matthew@wil.cx, Yu Zhao Subject: [RFC PATCH 2/3] PCI: support PM D0hot->D3 transition reset Date: Tue, 7 Apr 2009 09:33:30 +0800 Message-Id: <1239068011-15164-2-git-send-email-yu.zhao@intel.com> X-Mailer: git-send-email 1.6.1 In-Reply-To: <1239068011-15164-1-git-send-email-yu.zhao@intel.com> References: <1239068011-15164-1-git-send-email-yu.zhao@intel.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org PCI PM 1.2 specifies that the device will perform an internal reset upon transitioning from D3hot to D0 when the NO_SOFT_RESET bit is clear. This method can be used to reset a function if neither PCIe FLR nor PCI AF FLR are supported. Signed-off-by: Yu Zhao --- drivers/pci/pci.c | 34 ++++++++++++++++++++++++++++++++++ 1 files changed, 34 insertions(+), 0 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 46ae997..e459a0b 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -2085,6 +2085,36 @@ clear: return 0; } +static int pci_pm_reset(struct pci_dev *dev, int probe) +{ + u16 csr; + + if (!dev->pm_cap) + return -ENOTTY; + + pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &csr); + if (csr & PCI_PM_CTRL_NO_SOFT_RESET) + return -ENOTTY; + + if (probe) + return 0; + + if (dev->current_state != PCI_D0) + return -EINVAL; + + csr &= ~PCI_PM_CTRL_STATE_MASK; + csr |= PCI_D3hot; + pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr); + msleep(pci_pm_d3_delay); + + csr &= ~PCI_PM_CTRL_STATE_MASK; + csr |= PCI_D0; + pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr); + msleep(pci_pm_d3_delay); + + return 0; +} + static int pci_dev_reset(struct pci_dev *dev, int probe) { int rc; @@ -2102,6 +2132,10 @@ static int pci_dev_reset(struct pci_dev *dev, int probe) goto done; rc = pci_af_flr(dev, probe); + if (rc != -ENOTTY) + goto done; + + rc = pci_pm_reset(dev, probe); done: up(&dev->dev.sem);