@@ -871,6 +871,15 @@
#define PCI_SSVID_VENDOR 4
#define PCI_SSVID_DEVICE 6
+/* PCI Advanced Features */
+#define PCI_AF_CAP 3
+#define PCI_AF_CAP_TP 0x01
+#define PCI_AF_CAP_FLR 0x02
+#define PCI_AF_CTRL 4
+#define PCI_AF_CTRL_FLR 0x01
+#define PCI_AF_STATUS 5
+#define PCI_AF_STATUS_TP 0x01
+
/* Advanced Error Reporting */
#define PCI_ERR_UNCOR_STATUS 4 /* Uncorrectable Error Status */
#define PCI_ERR_UNC_TRAIN 0x00000001 /* Undefined in PCIe rev1.1 & 2.0 spec */
@@ -1146,6 +1146,24 @@ cap_debug_port(int cap)
printf("Debug port: BAR=%d offset=%04x\n", bar, pos);
}
+static void
+cap_af(struct device *d, int where)
+{
+ u8 reg;
+
+ printf("PCI Advanced Features\n");
+ if (verbose < 2 || !config_fetch(d, where + PCI_AF_CAP, 3))
+ return;
+
+ reg = get_conf_byte(d, where + PCI_AF_CAP);
+ printf("\t\tAFCap: TP%c FLR%c\n", FLAG(reg, PCI_AF_CAP_TP),
+ FLAG(reg, PCI_AF_CAP_FLR));
+ reg = get_conf_byte(d, where + PCI_AF_CTRL);
+ printf("\t\tAFCtrl: FLR%c\n", FLAG(reg, PCI_AF_CTRL_FLR));
+ reg = get_conf_byte(d, where + PCI_AF_STATUS);
+ printf("\t\tAFStatus: TP%c\n", FLAG(reg, PCI_AF_STATUS_TP));
+}
+
void
show_caps(struct device *d)
{
@@ -1207,7 +1225,7 @@ show_caps(struct device *d)
cap_ht(d, where, cap);
break;
case PCI_CAP_ID_VNDR:
- printf("Vendor Specific Information <?>\n");
+ printf("Vendor Specific Information\n");
break;
case PCI_CAP_ID_DBG:
cap_debug_port(cap);
@@ -1238,7 +1256,7 @@ show_caps(struct device *d)
printf("SATA HBA <?>\n");
break;
case PCI_CAP_ID_AF:
- printf("PCIe advanced features <?>\n");
+ cap_af(d, where);
break;
default:
printf("#%02x [%04x]\n", id, cap);
The capability is defined by http://www.pcisig.com/specifications/conventional/pci_30/ECN_Conventional_Adv_Caps_27Jul06.pdf Signed-off-by: Yu Zhao <yu.zhao@intel.com> --- lib/header.h | 9 +++++++++ ls-caps.c | 22 ++++++++++++++++++++-- 2 files changed, 29 insertions(+), 2 deletions(-)