@@ -158,7 +158,7 @@ static u32 __msix_mask_irq(struct msi_desc *desc, u32 flag)
u32 mask_bits = desc->masked;
unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
PCI_MSIX_ENTRY_VECTOR_CTRL;
- mask_bits &= ~1;
+ mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;
mask_bits |= flag;
writel(mask_bits, desc->mask_base + offset);
@@ -185,7 +185,7 @@ static void msi_set_mask_bit(unsigned irq, u32 flag)
void mask_msi_irq(unsigned int irq)
{
- msi_set_mask_bit(irq, 1);
+ msi_set_mask_bit(irq, PCI_MSIX_ENTRY_CTRL_MASKBIT);
}
void unmask_msi_irq(unsigned int irq)
@@ -313,6 +313,7 @@
#define PCI_MSIX_ENTRY_UPPER_ADDR 4
#define PCI_MSIX_ENTRY_DATA 8
#define PCI_MSIX_ENTRY_VECTOR_CTRL 12
+#define PCI_MSIX_ENTRY_CTRL_MASKBIT 1
/* CompactPCI Hotswap Register */