From patchwork Mon Jul 9 10:49:30 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shengzhou Liu X-Patchwork-Id: 1172561 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id EAD1C40B18 for ; Mon, 9 Jul 2012 11:19:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753305Ab2GILLJ (ORCPT ); Mon, 9 Jul 2012 07:11:09 -0400 Received: from [216.32.181.185] ([216.32.181.185]:5977 "EHLO ch1outboundpool.messaging.microsoft.com" rhost-flags-FAIL-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1753227Ab2GILLI (ORCPT ); Mon, 9 Jul 2012 07:11:08 -0400 Received: from mail20-ch1-R.bigfish.com (10.43.68.245) by CH1EHSOBE014.bigfish.com (10.43.70.64) with Microsoft SMTP Server id 14.1.225.23; Mon, 9 Jul 2012 11:08:12 +0000 Received: from mail20-ch1 (localhost [127.0.0.1]) by mail20-ch1-R.bigfish.com (Postfix) with ESMTP id DD03E20009F; Mon, 9 Jul 2012 11:08:11 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h839he5bhf0ah107ah) Received: from mail20-ch1 (localhost.localdomain [127.0.0.1]) by mail20-ch1 (MessageSwitch) id 134183209041966_12774; Mon, 9 Jul 2012 11:08:10 +0000 (UTC) Received: from CH1EHSMHS015.bigfish.com (snatpool3.int.messaging.microsoft.com [10.43.68.226]) by mail20-ch1.bigfish.com (Postfix) with ESMTP id F2DC74E0073; Mon, 9 Jul 2012 11:08:09 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CH1EHSMHS015.bigfish.com (10.43.70.15) with Microsoft SMTP Server (TLS) id 14.1.225.23; Mon, 9 Jul 2012 11:08:09 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server (TLS) id 14.2.298.5; Mon, 9 Jul 2012 06:10:25 -0500 Received: from localhost.localdomain (rock.ap.freescale.net [10.193.20.106]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id q69BAMUX010361; Mon, 9 Jul 2012 04:10:22 -0700 From: Shengzhou Liu To: CC: , , Shengzhou Liu Subject: [PATCH] PCI: Add pcie_irq=other to enable non MSI/INTx interrupt for port service driver Date: Mon, 9 Jul 2012 18:49:30 +0800 Message-ID: <1341830970-12779-1-git-send-email-Shengzhou.Liu@freescale.com> X-Mailer: git-send-email 1.6.4 MIME-Version: 1.0 X-OriginatorOrg: freescale.com Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On some platforms, in RC mode, root port has neither MSI/MSI-X nor INTx interrupt generated, which are available only in EP mode on those platform. In this case, we try to use other interrupt if supported (i.e. there is the shared error interrupt on platform P1010, P3041, P4080, etc) to have AER, Hot-plug, etc, services to work. Signed-off-by: Shengzhou Liu --- Documentation/kernel-parameters.txt | 4 ++++ drivers/pci/pcie/portdrv_core.c | 19 +++++++++++++++++++ 2 files changed, 23 insertions(+), 0 deletions(-) diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index a92c5eb..af97c81 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -2218,6 +2218,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted. nomsi Do not use MSI for native PCIe PME signaling (this makes all PCIe root ports use INTx for all services). + pcie_irq= [PCIE] Native PCIe root port interrupt options: + other Try to use other interrupt when root port has + neither MSI/MSI-X nor INTx support. + pcmv= [HW,PCMCIA] BadgePAD 4 pd. [PARIDE] diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index 75915b3..653679e 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -30,6 +30,17 @@ static int __init pciehp_setup(char *str) } __setup("pcie_hp=", pciehp_setup); +bool port_other_interrupt_enabled; + +static int __init portservice_setup(char *str) +{ + if (!strncmp(str, "other", 5)) + port_other_interrupt_enabled = true; + + return 1; +} +__setup("pcie_irq=", portservice_setup); + /** * release_pcie_device - free PCI Express port service device structure * @dev: Port service device to release @@ -216,6 +227,14 @@ static int init_service_irqs(struct pci_dev *dev, int *irqs, int mask) if (!pci_enable_msi(dev) || dev->pin) irq = dev->irq; + /* + * On some platforms, root port has neither MSI/MSI-X nor INTx + * interrupt support in RC mode, so try to use other interrupt(i.e. + * shared interrupt if supported). + */ + else if (port_other_interrupt_enabled && dev->irq) + irq = dev->irq; + no_msi: for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) irqs[i] = irq;