From patchwork Tue Jul 24 16:31:33 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiang Liu X-Patchwork-Id: 1232191 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 32DEBDFFCE for ; Tue, 24 Jul 2012 16:37:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932165Ab2GXQgq (ORCPT ); Tue, 24 Jul 2012 12:36:46 -0400 Received: from mail-gg0-f174.google.com ([209.85.161.174]:55727 "EHLO mail-gg0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755964Ab2GXQgp (ORCPT ); Tue, 24 Jul 2012 12:36:45 -0400 Received: by gglu4 with SMTP id u4so6859929ggl.19 for ; Tue, 24 Jul 2012 09:36:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=nNtlcwYI3uWtjJr9OtLqHZeMQbRCv9MhnBVbTxJaIA4=; b=N3sq3iqv/ceoy7L40q5dZsGIuq8rGL8wXWPUJSxteqqy59K9xTJO8e9JXoBpP7hoMU 3fasreT0hG4aycfUa03hZCX+AQ6fF+k5E0EA3RL8ZiYE4ie2/Dfdo0us0oaE33s62cIA fNy2e8l7RtvcJ67mk2qovyL0j7EvvuSTqrPsS8lXiJaKVCtV7W4h+Ymb2KDVxlPRuEr8 0bCLV6Z1li0VzLLbY1koQxKdAOuzc3ErFULtbRqhPiyAcceW4+21QC/oZsSIa1/qXCJm RrstSCO0fCXQNShODjwTfq4Jv4W3mM0c9vjL7UmtogLs6dLz/wj6ceLOhnL6bcGjnr4j G9tg== Received: by 10.66.80.193 with SMTP id t1mr5905462pax.40.1343147804294; Tue, 24 Jul 2012 09:36:44 -0700 (PDT) Received: from localhost.localdomain ([221.221.26.244]) by mx.google.com with ESMTPS id wi6sm12457583pbc.35.2012.07.24.09.36.35 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 24 Jul 2012 09:36:43 -0700 (PDT) From: Jiang Liu To: Bjorn Helgaas , Don Dutile Cc: Jiang Liu , Yinghai Lu , Taku Izumi , "Rafael J . Wysocki" , Kenji Kaneshige , Yijing Wang , linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, Jiang Liu Subject: [RFC PATCH v2 21/32] PCI/myri10ge: use PCIe capabilities access functions to simplify implementation Date: Wed, 25 Jul 2012 00:31:33 +0800 Message-Id: <1343147504-25891-22-git-send-email-jiang.liu@huawei.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1343147504-25891-1-git-send-email-jiang.liu@huawei.com> References: <1343147504-25891-1-git-send-email-jiang.liu@huawei.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Jiang Liu Use PCIe capabilities access functions to simplify myri10ge driver's implementation. Signed-off-by: Jiang Liu Signed-off-by: Yijing Wang --- drivers/net/ethernet/myricom/myri10ge/myri10ge.c | 21 ++++++++------------- 1 file changed, 8 insertions(+), 13 deletions(-) diff --git a/drivers/net/ethernet/myricom/myri10ge/myri10ge.c b/drivers/net/ethernet/myricom/myri10ge/myri10ge.c index 90153fc..3566236 100644 --- a/drivers/net/ethernet/myricom/myri10ge/myri10ge.c +++ b/drivers/net/ethernet/myricom/myri10ge/myri10ge.c @@ -1078,14 +1078,13 @@ static int myri10ge_reset(struct myri10ge_priv *mgp) #ifdef CONFIG_MYRI10GE_DCA static int myri10ge_toggle_relaxed(struct pci_dev *pdev, int on) { - int ret, cap, err; + int ret, err; u16 ctl; - cap = pci_pcie_cap(pdev); - if (!cap) + if (!pci_is_pcie(pdev)) return 0; - err = pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &ctl); + err = pci_pcie_capability_read_word(pdev, PCI_EXP_DEVCTL, &ctl); if (err) return 0; @@ -1093,7 +1092,7 @@ static int myri10ge_toggle_relaxed(struct pci_dev *pdev, int on) if (ret != on) { ctl &= ~PCI_EXP_DEVCTL_RELAX_EN; ctl |= (on << 4); - pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, ctl); + pci_pcie_capability_write_word(pdev, PCI_EXP_DEVCTL, ctl); } return ret; } @@ -3200,8 +3199,7 @@ static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp) return; /* check that the bridge is a root port */ - cap = pci_pcie_cap(bridge); - pci_read_config_word(bridge, cap + PCI_CAP_FLAGS, &val); + val = bridge->pcie_flags_reg; ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4; if (ext_type != PCI_EXP_TYPE_ROOT_PORT) { if (myri10ge_ecrc_enable > 1) { @@ -3218,9 +3216,7 @@ static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp) " to force ECRC\n"); return; } - cap = pci_pcie_cap(bridge); - pci_read_config_word(bridge, - cap + PCI_CAP_FLAGS, &val); + val = bridge->pcie_flags_reg; ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4; } while (ext_type != PCI_EXP_TYPE_ROOT_PORT); @@ -3335,11 +3331,10 @@ static void myri10ge_select_firmware(struct myri10ge_priv *mgp) int overridden = 0; if (myri10ge_force_firmware == 0) { - int link_width, exp_cap; + int link_width; u16 lnk; - exp_cap = pci_pcie_cap(mgp->pdev); - pci_read_config_word(mgp->pdev, exp_cap + PCI_EXP_LNKSTA, &lnk); + pci_pcie_capability_read_word(mgp->pdev, PCI_EXP_LNKSTA, &lnk); link_width = (lnk >> 4) & 0x3f; /* Check to see if Link is less than 8 or if the