From patchwork Wed Aug 1 15:54:26 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiang Liu X-Patchwork-Id: 1265201 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 764643FC23 for ; Wed, 1 Aug 2012 16:02:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755972Ab2HAP6l (ORCPT ); Wed, 1 Aug 2012 11:58:41 -0400 Received: from mail-pb0-f46.google.com ([209.85.160.46]:61939 "EHLO mail-pb0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755556Ab2HAP6j (ORCPT ); Wed, 1 Aug 2012 11:58:39 -0400 Received: by pbbrp8 with SMTP id rp8so1286503pbb.19 for ; Wed, 01 Aug 2012 08:58:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=jj64YSGeiOPaw3HukMwE23yBdud94ahYHIj5lf/XERA=; b=uDBftaFjk8IrgO1bNmxLTwdCEtOaoY3/ZKRlqrgpQmziI5ejhMoUgLo9l4VKuqIzgb Rr9EwXbjIUOnM1xJqNHNiR00VtCSGAX6i0ilBPmgX1DT0qvnxgn9+4gUge4KXCvcEju+ hWHcsyc+XGgZAJEDKv4C+jp1R3UxmuEjJgCjHJfBtH331NCmsQxLjjiMnKWSXyCqJ12/ hLKm0baLir1w9jSon/TyDcxOVMnsLHQWUy1XJfzfgrHj6fBqrWtT4zcNCPYzMIu4a3Un biocGda9WXTmiTOOGGpDa9lIcdQZVAuEUvFG3ekUNc1fxr/EA114XgAopq4lDhVDRYaL mtxA== Received: by 10.68.238.166 with SMTP id vl6mr52821553pbc.96.1343836718707; Wed, 01 Aug 2012 08:58:38 -0700 (PDT) Received: from localhost.localdomain ([58.250.81.2]) by mx.google.com with ESMTPS id pe8sm2816231pbc.76.2012.08.01.08.58.27 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 01 Aug 2012 08:58:36 -0700 (PDT) From: Jiang Liu To: Bjorn Helgaas , Don Dutile , Jon Mason , Andrew Gallatin Cc: Jiang Liu , Yinghai Lu , Taku Izumi , "Rafael J . Wysocki" , Kenji Kaneshige , Yijing Wang , linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, Jiang Liu Subject: [PATCH v3 21/32] PCI/myri10ge: use PCIe capabilities access functions to simplify implementation Date: Wed, 1 Aug 2012 23:54:26 +0800 Message-Id: <1343836477-7287-22-git-send-email-jiang.liu@huawei.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1343836477-7287-1-git-send-email-jiang.liu@huawei.com> References: <1343836477-7287-1-git-send-email-jiang.liu@huawei.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Jiang Liu Use PCIe capabilities access functions to simplify myri10ge driver's implementation. Signed-off-by: Jiang Liu Signed-off-by: Yijing Wang --- drivers/net/ethernet/myricom/myri10ge/myri10ge.c | 39 ++++------------------ 1 file changed, 7 insertions(+), 32 deletions(-) diff --git a/drivers/net/ethernet/myricom/myri10ge/myri10ge.c b/drivers/net/ethernet/myricom/myri10ge/myri10ge.c index 90153fc..fe6c44d 100644 --- a/drivers/net/ethernet/myricom/myri10ge/myri10ge.c +++ b/drivers/net/ethernet/myricom/myri10ge/myri10ge.c @@ -1078,24 +1078,8 @@ static int myri10ge_reset(struct myri10ge_priv *mgp) #ifdef CONFIG_MYRI10GE_DCA static int myri10ge_toggle_relaxed(struct pci_dev *pdev, int on) { - int ret, cap, err; - u16 ctl; - - cap = pci_pcie_cap(pdev); - if (!cap) - return 0; - - err = pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &ctl); - if (err) - return 0; - - ret = (ctl & PCI_EXP_DEVCTL_RELAX_EN) >> 4; - if (ret != on) { - ctl &= ~PCI_EXP_DEVCTL_RELAX_EN; - ctl |= (on << 4); - pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, ctl); - } - return ret; + return pci_pcie_capability_change_word(pdev, PCI_EXP_DEVCTL, + on << 4, PCI_EXP_DEVCTL_RELAX_EN); } static void @@ -3192,18 +3176,13 @@ static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp) struct device *dev = &mgp->pdev->dev; int cap; unsigned err_cap; - u16 val; - u8 ext_type; int ret; if (!myri10ge_ecrc_enable || !bridge) return; /* check that the bridge is a root port */ - cap = pci_pcie_cap(bridge); - pci_read_config_word(bridge, cap + PCI_CAP_FLAGS, &val); - ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4; - if (ext_type != PCI_EXP_TYPE_ROOT_PORT) { + if (pci_pcie_type(bridge) != PCI_EXP_TYPE_ROOT_PORT) { if (myri10ge_ecrc_enable > 1) { struct pci_dev *prev_bridge, *old_bridge = bridge; @@ -3218,11 +3197,8 @@ static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp) " to force ECRC\n"); return; } - cap = pci_pcie_cap(bridge); - pci_read_config_word(bridge, - cap + PCI_CAP_FLAGS, &val); - ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4; - } while (ext_type != PCI_EXP_TYPE_ROOT_PORT); + } while (pci_pcie_type(bridge) != + PCI_EXP_TYPE_ROOT_PORT); dev_info(dev, "Forcing ECRC on non-root port %s" @@ -3335,11 +3311,10 @@ static void myri10ge_select_firmware(struct myri10ge_priv *mgp) int overridden = 0; if (myri10ge_force_firmware == 0) { - int link_width, exp_cap; + int link_width; u16 lnk; - exp_cap = pci_pcie_cap(mgp->pdev); - pci_read_config_word(mgp->pdev, exp_cap + PCI_EXP_LNKSTA, &lnk); + pci_pcie_capability_read_word(mgp->pdev, PCI_EXP_LNKSTA, &lnk); link_width = (lnk >> 4) & 0x3f; /* Check to see if Link is less than 8 or if the