From patchwork Tue Oct 9 03:02:51 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yijing Wang X-Patchwork-Id: 1567701 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 53763DF238 for ; Tue, 9 Oct 2012 03:05:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754800Ab2JIDE7 (ORCPT ); Mon, 8 Oct 2012 23:04:59 -0400 Received: from szxga01-in.huawei.com ([119.145.14.64]:1364 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754746Ab2JIDE7 (ORCPT ); Mon, 8 Oct 2012 23:04:59 -0400 Received: from 172.24.2.119 (EHLO szxeml207-edg.china.huawei.com) ([172.24.2.119]) by szxrg01-dlp.huawei.com (MOS 4.3.4-GA FastPath queued) with ESMTP id AQF49138; Tue, 09 Oct 2012 11:04:53 +0800 (CST) Received: from SZXEML407-HUB.china.huawei.com (10.82.67.94) by szxeml207-edg.china.huawei.com (172.24.2.56) with Microsoft SMTP Server (TLS) id 14.1.323.3; Tue, 9 Oct 2012 11:03:28 +0800 Received: from localhost (10.135.76.84) by szxeml407-hub.china.huawei.com (10.82.67.94) with Microsoft SMTP Server id 14.1.323.3; Tue, 9 Oct 2012 11:03:19 +0800 From: Yijing Wang To: Bjorn Helgaas CC: , Hanjun Guo , , Yinghai Lu , Yijing Wang Subject: [PATCH] PCI: add pcie max_payload_size debug info Date: Tue, 9 Oct 2012 11:02:51 +0800 Message-ID: <1349751771-9512-1-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.11.msysgit.1 MIME-Version: 1.0 X-Originating-IP: [10.135.76.84] X-CFilter-Loop: Reflected Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org PCIe device mps maybe not equal to its bridge mps after doing pci hotplug. This may result unexpected problem like http://marc.info/?l=linux-scsi&m=134788365823217&w=2. So add mps log for current mps setting to help diagnosis an issue like this. Signed-off-by: Yijing Wang --- drivers/pci/probe.c | 38 ++++++++++++++++++++++++++++++++++++++ 1 files changed, 38 insertions(+), 0 deletions(-) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index ec909af..ff1f98d 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -1533,6 +1533,42 @@ static void pcie_write_mrrs(struct pci_dev *dev) "with pci=pcie_bus_safe.\n"); } +static void pcie_dump_bus_mps(struct pci_bus *bus); + +static void pcie_dump_dev_mps(struct pci_dev *dev) +{ + int mps, mpss; + + if (!pci_is_pcie(dev)) + return; + + if (dev->subordinate) + pcie_dump_bus_mps(dev->subordinate); + else { + mps = pcie_get_mps(dev); + mpss = 128 << dev->pcie_mpss; + dev_printk(KERN_DEBUG, &dev->dev, "PCI-E Max_Payload_Size Supported %d, " + "Max_Payload_Size %d\n", mpss, mps); + } +} + +static void pcie_dump_bus_mps(struct pci_bus *bus) +{ + int mps, mpss; + struct pci_dev *dev; + + if (!bus->self || !pci_is_pcie(bus->self)) + return; + + mps = pcie_get_mps(bus->self); + mpss = 128 << bus->self->pcie_mpss; + dev_printk(KERN_DEBUG, &bus->self->dev, "PCI-E Max_Payload_Size Supported %d, " + "Max_Payload_Size %d\n", mpss, mps); + + list_for_each_entry(dev, &bus->devices, bus_list) + pcie_dump_dev_mps(dev); +} + static int pcie_bus_configure_set(struct pci_dev *dev, void *data) { int mps, orig_mps; @@ -1564,6 +1600,8 @@ void pcie_bus_configure_settings(struct pci_bus *bus, u8 mpss) if (!pci_is_pcie(bus->self)) return; + pcie_dump_bus_mps(bus); + if (pcie_bus_config == PCIE_BUS_TUNE_OFF) return;