| Message ID | 1362755960-30791-15-git-send-email-thomas.petazzoni@free-electrons.com (mailing list archive) |
|---|---|
| State | New, archived |
| Delegated to: | Bjorn Helgaas |
| Headers | show |
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts index e83505e..fdfdfc6 100644 --- a/arch/arm/boot/dts/armada-xp-db.dts +++ b/arch/arm/boot/dts/armada-xp-db.dts @@ -121,5 +121,32 @@ spi-max-frequency = <20000000>; }; }; + + pcie-controller { + status = "okay"; + + /* + * All 6 slots are physically present as + * standard PCIe slots on the board. + */ + pcie@0,0 { + status = "okay"; + }; + pcie@0,1 { + status = "okay"; + }; + pcie@0,2 { + status = "okay"; + }; + pcie@0,3 { + status = "okay"; + }; + pcie@2,0 { + status = "okay"; + }; + pcie@3,0 { + status = "okay"; + }; + }; }; };
The Marvell evaluation board (DB) for the Armada XP SoC has 6 physicals full-size PCIe slots, so we enable the corresponding PCIe interfaces in the Device Tree. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> --- arch/arm/boot/dts/armada-xp-db.dts | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+)