From patchwork Thu May 16 15:55:16 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Petazzoni X-Patchwork-Id: 2578861 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 9410E3FE1F for ; Thu, 16 May 2013 15:57:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752639Ab3EPP5r (ORCPT ); Thu, 16 May 2013 11:57:47 -0400 Received: from mail.free-electrons.com ([94.23.35.102]:60137 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754733Ab3EPP5m (ORCPT ); Thu, 16 May 2013 11:57:42 -0400 Received: by mail.free-electrons.com (Postfix, from userid 106) id 92EF0CB9; Thu, 16 May 2013 17:57:41 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.3.2 Received: from localhost (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id EE0F1215B; Thu, 16 May 2013 17:55:26 +0200 (CEST) From: Thomas Petazzoni To: Jason Cooper , Andrew Lunn , Gregory Clement Cc: linux-arm-kernel@lists.infradead.org, Arnd Bergmann , Olof Johansson , Bjorn Helgaas , Grant Likely , Lior Amsalem , Maen Suleiman , Tawfik Bayouk , Jason Gunthorpe , linux-pci@vger.kernel.org, Thierry Reding , Rob Herring , Ezequiel Garcia , devicetree-discuss@lists.ozlabs.org Subject: [PATCHv10 1/9] arm: mvebu: fix the 'ranges' property to handle PCIe Date: Thu, 16 May 2013 17:55:16 +0200 Message-Id: <1368719725-21265-2-git-send-email-thomas.petazzoni@free-electrons.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1368719725-21265-1-git-send-email-thomas.petazzoni@free-electrons.com> References: <1368719725-21265-1-git-send-email-thomas.petazzoni@free-electrons.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Since 82a682676 ('ARM: dts: mvebu: Convert all the mvebu files to use the range property') all the device nodes of Armada 370/XP are under a common 'ranges' property that translates the device register addresses into their absolute address, thanks to the base address of the internal register space. However, beyond just the register areas, there are also PCIe I/O and memory regions, whose addresses should be properly translated. This patch fixes the Armada 370 and XP ranges property to take PCIe into account properly. Signed-off-by: Thomas Petazzoni --- Since the PCIe Device Tree description has been merged in 3.10-rc1, this commit should go in 3.10-rc as well. --- arch/arm/boot/dts/armada-370-xp.dtsi | 3 ++- arch/arm/boot/dts/armada-370.dtsi | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi index 272bbc6..550eb77 100644 --- a/arch/arm/boot/dts/armada-370-xp.dtsi +++ b/arch/arm/boot/dts/armada-370-xp.dtsi @@ -33,7 +33,8 @@ #size-cells = <1>; compatible = "simple-bus"; interrupt-parent = <&mpic>; - ranges = <0 0 0xd0000000 0x100000>; + ranges = <0 0 0xd0000000 0x0100000 /* internal registers */ + 0xe0000000 0 0xe0000000 0x8100000 /* PCIe */>; internal-regs { compatible = "simple-bus"; diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi index b2c1b5a..834c9be 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi @@ -29,7 +29,8 @@ }; soc { - ranges = <0 0xd0000000 0x100000>; + ranges = <0 0xd0000000 0x0100000 /* internal registers */ + 0xe0000000 0xe0000000 0x8100000 /* PCIe */>; internal-regs { system-controller@18200 { compatible = "marvell,armada-370-xp-system-controller";