From patchwork Tue May 28 02:55:09 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yijing Wang X-Patchwork-Id: 2621811 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 3A30D3FDBC for ; Tue, 28 May 2013 02:55:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758664Ab3E1Czk (ORCPT ); Mon, 27 May 2013 22:55:40 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:23870 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758611Ab3E1Czj (ORCPT ); Mon, 27 May 2013 22:55:39 -0400 Received: from 172.24.2.119 (EHLO szxeml205-edg.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.4-GA FastPath queued) with ESMTP id BCF96963; Tue, 28 May 2013 10:55:31 +0800 (CST) Received: from SZXEML402-HUB.china.huawei.com (10.82.67.32) by szxeml205-edg.china.huawei.com (172.24.2.58) with Microsoft SMTP Server (TLS) id 14.1.323.7; Tue, 28 May 2013 10:55:30 +0800 Received: from localhost (10.135.76.69) by szxeml402-hub.china.huawei.com (10.82.67.32) with Microsoft SMTP Server id 14.1.323.7; Tue, 28 May 2013 10:55:24 +0800 From: Yijing Wang To: Bjorn Helgaas CC: , Hanjun Guo , Yijing Wang , Yinghai Lu , Jiang Liu , "Rafael J. Wysocki" , Feng Tang Subject: [PATCH] PCI/X86: increase info->res_num before checking pci_use_crs return Date: Tue, 28 May 2013 10:55:09 +0800 Message-ID: <1369709709-14504-1-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.11.msysgit.1 MIME-Version: 1.0 X-Originating-IP: [10.135.76.69] X-CFilter-Loop: Reflected Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org I separate this patch from patchset "Add hostbridge resource release to support root bus hotplug in IA64", because it's a Separate issue. We should increase info->res_num before we checking pci_use_crs return when pci=nocrs set. Signed-off-by: Yijing Wang Cc: Yinghai Lu Cc: Jiang Liu Cc: "Rafael J. Wysocki" Cc: Feng Tang --- arch/x86/pci/acpi.c | 7 ++----- 1 files changed, 2 insertions(+), 5 deletions(-) diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c index 3e72425..662dfdf 100644 --- a/arch/x86/pci/acpi.c +++ b/arch/x86/pci/acpi.c @@ -324,14 +324,11 @@ setup_resource(struct acpi_resource *acpi_res, void *data) res->start = start; res->end = end; info->res_offset[info->res_num] = addr.translation_offset; + info->res_num++; - if (!pci_use_crs) { + if (!pci_use_crs) dev_printk(KERN_DEBUG, &info->bridge->dev, "host bridge window %pR (ignored)\n", res); - return AE_OK; - } - - info->res_num++; return AE_OK; }