From patchwork Wed Jul 31 09:59:30 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kirsher, Jeffrey T" X-Patchwork-Id: 2836208 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9ECA49F9FF for ; Wed, 31 Jul 2013 10:01:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7704220326 for ; Wed, 31 Jul 2013 10:01:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4B8BA20333 for ; Wed, 31 Jul 2013 10:01:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759162Ab3GaKAY (ORCPT ); Wed, 31 Jul 2013 06:00:24 -0400 Received: from mga14.intel.com ([143.182.124.37]:43699 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759124Ab3GaJ7q (ORCPT ); Wed, 31 Jul 2013 05:59:46 -0400 Received: from azsmga001.ch.intel.com ([10.2.17.19]) by azsmga102.ch.intel.com with ESMTP; 31 Jul 2013 02:59:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.89,786,1367996400"; d="scan'208";a="339470112" Received: from unknown (HELO jtkirshe-mobl.amr.corp.intel.com) ([10.255.13.204]) by azsmga001.ch.intel.com with ESMTP; 31 Jul 2013 02:59:44 -0700 From: Jeff Kirsher To: davem@davemloft.net, bhelgaas@google.com Cc: Jacob Keller , netdev@vger.kernel.org, gospo@redhat.com, sassmann@redhat.com, linux-pci@vger.kernel.org, Jeff Kirsher Subject: [net-next v2 08/15] PCI: expose pcie_link_speed and pcix_bus_speed arrays Date: Wed, 31 Jul 2013 02:59:30 -0700 Message-Id: <1375264777-13595-9-git-send-email-jeffrey.t.kirsher@intel.com> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1375264777-13595-1-git-send-email-jeffrey.t.kirsher@intel.com> References: <1375264777-13595-1-git-send-email-jeffrey.t.kirsher@intel.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-8.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jacob Keller pcie_link_speed and pcix_bus_speed are arrays used by probe.c to correctly convert lnksta register values into the pci_bus_speed enum. These static arrays are useful outside probe for this purpose. This patch makes these defines into conist arrays and exposes them with an extern header in drivers/pci/pci.h -v2- * move extern declarations to drivers/pci/pci.h CC: Bjorn Helgaas Signed-off-by: Jacob Keller Signed-off-by: Jeff Kirsher Acked-by: Bjorn Helgaas --- drivers/pci/pci.h | 3 +++ drivers/pci/probe.c | 4 ++-- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index d1182c4..948d1a0 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -6,6 +6,9 @@ #define PCI_CFG_SPACE_SIZE 256 #define PCI_CFG_SPACE_EXP_SIZE 4096 +extern const unsigned char pcix_bus_speed[]; +extern const unsigned char pcie_link_speed[]; + /* Functions internal to the PCI core code */ int pci_create_sysfs_dev_files(struct pci_dev *pdev); diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 46ada5c..496c5b0 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -513,7 +513,7 @@ static struct pci_host_bridge *pci_alloc_host_bridge(struct pci_bus *b) return bridge; } -static unsigned char pcix_bus_speed[] = { +const unsigned char pcix_bus_speed[] = { PCI_SPEED_UNKNOWN, /* 0 */ PCI_SPEED_66MHz_PCIX, /* 1 */ PCI_SPEED_100MHz_PCIX, /* 2 */ @@ -532,7 +532,7 @@ static unsigned char pcix_bus_speed[] = { PCI_SPEED_133MHz_PCIX_533 /* F */ }; -static unsigned char pcie_link_speed[] = { +const unsigned char pcie_link_speed[] = { PCI_SPEED_UNKNOWN, /* 0 */ PCIE_SPEED_2_5GT, /* 1 */ PCIE_SPEED_5_0GT, /* 2 */