@@ -1501,14 +1501,11 @@ static int pcie_find_smpss(struct pci_dev *dev, void *data)
* To work around this, the MPS for the entire fabric must be
* set to the minimum size. Any devices hotplugged into this
* fabric will have the minimum MPS set. If the PCI hotplug
- * slot is directly connected to the root port and there are not
- * other devices on the fabric (which seems to be the most
- * common case), then this is not an issue and MPS discovery
- * will occur as normal.
+ * slot is directly connected to the root port, then this is
+ * not an issue and MPS discovery will occur as normal.
*/
- if (dev->is_hotplug_bridge && (!list_is_singular(&dev->bus->devices) ||
- (dev->bus->self &&
- pci_pcie_type(dev->bus->self) != PCI_EXP_TYPE_ROOT_PORT)))
+ if (dev->is_hotplug_bridge &&
+ pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM)
*smpss = 0;
if (*smpss > dev->pcie_mpss)
In "pci=pcie_bus_safe" mode, if find a hotplug slot, we will set all devices which in the path mps value to the minimum mps support(128B). Unless the slot is directly connected to root port, and there are not other devices on the fabric. In the latter case, we will set root port and device mps to the minmum mpss support for performace. Currently we use list_is_singular() to identify whether slot is the only one connected to root port, it's not necessary, because root port always connected to only one slot. Following is test info: -+-[0000:40]-+-00.0-[0000:41]-- ................ | +-05.0-[0000:45]-- | +-07.0-[0000:46]--+-00.0 Intel Corporation 82576 Gigabit Network Connection | | \-00.1 Intel Corporation 82576 Gigabit Network Connection root port (40:07.0 mps=256 mpss=256) EndPoing deivce (46:00.0/1 mps=256 mpss=512) linux-ha2:/sys/bus/pci/slots/7 # echo 0 > power linux-ha2:/sys/bus/pci/slots/7 # echo 1 > power linux-ha2:/sys/bus/pci/slots/7 # dmesg ........................... pcieport 0000:40:07.0: PCI-E Max Payload Size set to 256/ 256 (was 256), Max Read Rq 128 pci 0000:46:00.0: PCI-E Max Payload Size set to 256/ 512 (was 128), Max Read Rq 512 pci 0000:46:00.1: PCI-E Max Payload Size set to 256/ 512 (was 128), Max Read Rq 512 pcieport 0000:40:07.0: PCI-E Max Payload Size set to 256/ 256 (was 256), Max Read Rq 128 pci 0000:46:00.0: PCI-E Max Payload Size set to 256/ 512 (was 256), Max Read Rq 512 pci 0000:46:00.1: PCI-E Max Payload Size set to 256/ 512 (was 256), Max Read Rq 512 ........................... result is good, root port and device mps were wrote to 256, original code wrote to 128 Signed-off-by: Yijing Wang <wangyijing@huawei.com> Cc: Jon Mason <jdmason@kudzu.us> --- drivers/pci/probe.c | 11 ++++------- 1 files changed, 4 insertions(+), 7 deletions(-)